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comparison blastem.c @ 697:7f96bd1cb1be

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Sync fixes and logging to fix more sync issues
author Michael Pavone <pavone@retrodev.com>
date Mon, 11 May 2015 00:28:47 -0700
parents 0b2242bbc84a
children 72ab94527a8a
comparison
equal deleted inserted replaced
696:0b2242bbc84a 697:7f96bd1cb1be
201 ym_run(gen->ym, target); 201 ym_run(gen->ym, target);
202 202
203 //printf("Target: %d, YM bufferpos: %d, PSG bufferpos: %d\n", target, gen->ym->buffer_pos, gen->psg->buffer_pos * 2); 203 //printf("Target: %d, YM bufferpos: %d, PSG bufferpos: %d\n", target, gen->ym->buffer_pos, gen->psg->buffer_pos * 2);
204 } 204 }
205 205
206 uint32_t frame=0; 206 uint32_t last_frame_num;
207 m68k_context * sync_components(m68k_context * context, uint32_t address) 207 m68k_context * sync_components(m68k_context * context, uint32_t address)
208 { 208 {
209 genesis_context * gen = context->system; 209 genesis_context * gen = context->system;
210 vdp_context * v_context = gen->vdp; 210 vdp_context * v_context = gen->vdp;
211 z80_context * z_context = gen->z80; 211 z80_context * z_context = gen->z80;
212 uint32_t mclks = context->current_cycle; 212 uint32_t mclks = context->current_cycle;
213 sync_z80(z_context, mclks); 213 sync_z80(z_context, mclks);
214 sync_sound(gen, mclks); 214 sync_sound(gen, mclks);
215 if (mclks >= gen->frame_end) { 215 vdp_run_context(v_context, mclks);
216 vdp_run_context(v_context, gen->frame_end); 216 if (v_context->frame != last_frame_num) {
217 if (vdp_is_frame_over(v_context)) { 217 //printf("reached frame end %d | MCLK Cycles: %d, Target: %d, VDP cycles: %d, vcounter: %d, hslot: %d\n", last_frame_num, mclks, gen->frame_end, v_context->cycles, v_context->vcounter, v_context->hslot);
218 //printf("reached frame end | MCLK Cycles: %d, Target: %d, VDP cycles: %d\n", mclks, gen->frame_end, v_context->cycles); 218 last_frame_num = v_context->frame;
219 219
220 if (!headless) { 220 if (!headless) {
221 break_on_sync |= wait_render_frame(v_context, frame_limit); 221 break_on_sync |= wait_render_frame(v_context, frame_limit);
222 } else if(exit_after){ 222 } else if(exit_after){
223 --exit_after; 223 --exit_after;
224 if (!exit_after) { 224 if (!exit_after) {
225 exit(0); 225 exit(0);
226 } 226 }
227 } 227 }
228 frame++; 228
229 mclks -= gen->frame_end; 229 vdp_adjust_cycles(v_context, mclks);
230 vdp_adjust_cycles(v_context, gen->frame_end); 230 io_adjust_cycles(gen->ports, context->current_cycle, mclks);
231 io_adjust_cycles(gen->ports, context->current_cycle, gen->frame_end); 231 io_adjust_cycles(gen->ports+1, context->current_cycle, mclks);
232 io_adjust_cycles(gen->ports+1, context->current_cycle, gen->frame_end); 232 io_adjust_cycles(gen->ports+2, context->current_cycle, mclks);
233 io_adjust_cycles(gen->ports+2, context->current_cycle, gen->frame_end); 233 context->current_cycle -= mclks;
234 context->current_cycle -= gen->frame_end; 234 z80_adjust_cycles(z_context, mclks);
235 z80_adjust_cycles(z_context, gen->frame_end); 235 gen->ym->current_cycle -= mclks;
236 gen->ym->current_cycle -= gen->frame_end; 236 gen->psg->cycles -= mclks;
237 gen->psg->cycles -= gen->frame_end; 237 if (gen->ym->write_cycle != CYCLE_NEVER) {
238 if (gen->ym->write_cycle != CYCLE_NEVER) { 238 gen->ym->write_cycle = gen->ym->write_cycle >= mclks ? gen->ym->write_cycle - mclks : 0;
239 gen->ym->write_cycle = gen->ym->write_cycle >= gen->frame_end ? gen->ym->write_cycle - gen->frame_end : 0; 239 }
240 } 240 gen->frame_end = vdp_cycles_to_frame_end(v_context);
241 if (mclks) { 241 } else {
242 vdp_run_context(v_context, mclks); 242 gen->frame_end = vdp_cycles_to_frame_end(v_context);
243 } 243 }
244 gen->frame_end = vdp_cycles_to_frame_end(v_context); 244 context->sync_cycle = gen->frame_end;
245 } else { 245 //printf("Set sync cycle to: %d @ %d, vcounter: %d, hslot: %d\n", context->sync_cycle, context->current_cycle, v_context->vcounter, v_context->hslot);
246 vdp_run_context(v_context, mclks);
247 gen->frame_end = vdp_cycles_to_frame_end(v_context);
248 }
249 context->sync_cycle = gen->frame_end;
250 } else {
251 //printf("running VDP for %d cycles\n", mclks - v_context->cycles);
252 vdp_run_context(v_context, mclks);
253 }
254 if (context->int_ack) { 246 if (context->int_ack) {
255 vdp_int_ack(v_context, context->int_ack); 247 vdp_int_ack(v_context, context->int_ack);
256 context->int_ack = 0; 248 context->int_ack = 0;
257 } 249 }
258 adjust_int_cycle(context, v_context); 250 adjust_int_cycle(context, v_context);
287 genesis_context * gen = context->system; 279 genesis_context * gen = context->system;
288 if (vdp_port < 0x10) { 280 if (vdp_port < 0x10) {
289 int blocked; 281 int blocked;
290 uint32_t before_cycle = v_context->cycles; 282 uint32_t before_cycle = v_context->cycles;
291 if (vdp_port < 4) { 283 if (vdp_port < 4) {
284
292 while (vdp_data_port_write(v_context, value) < 0) { 285 while (vdp_data_port_write(v_context, value) < 0) {
293 while(v_context->flags & FLAG_DMA_RUN) { 286 while(v_context->flags & FLAG_DMA_RUN) {
294 vdp_run_dma_done(v_context, gen->frame_end); 287 vdp_run_dma_done(v_context, gen->frame_end);
295 if (v_context->cycles >= gen->frame_end) { 288 if (v_context->cycles >= gen->frame_end) {
296 context->current_cycle = v_context->cycles; 289 context->current_cycle = v_context->cycles;
290 gen->bus_busy = 1;
297 sync_components(context, 0); 291 sync_components(context, 0);
292 gen->bus_busy = 0;
298 } 293 }
299 } 294 }
300 //context->current_cycle = v_context->cycles; 295 //context->current_cycle = v_context->cycles;
301 } 296 }
302 } else if(vdp_port < 8) { 297 } else if(vdp_port < 8) {
305 while (blocked) { 300 while (blocked) {
306 while(v_context->flags & FLAG_DMA_RUN) { 301 while(v_context->flags & FLAG_DMA_RUN) {
307 vdp_run_dma_done(v_context, gen->frame_end); 302 vdp_run_dma_done(v_context, gen->frame_end);
308 if (v_context->cycles >= gen->frame_end) { 303 if (v_context->cycles >= gen->frame_end) {
309 context->current_cycle = v_context->cycles; 304 context->current_cycle = v_context->cycles;
305 gen->bus_busy = 1;
310 sync_components(context, 0); 306 sync_components(context, 0);
307 gen->bus_busy = 0;
311 } 308 }
312 } 309 }
313 if (blocked < 0) { 310 if (blocked < 0) {
314 blocked = vdp_control_port_write(v_context, value); 311 blocked = vdp_control_port_write(v_context, value);
315 } else { 312 } else {
316 blocked = 0; 313 blocked = 0;
317 } 314 }
318 } 315 }
319 } else { 316 } else {
317 context->sync_cycle = gen->frame_end = vdp_cycles_to_frame_end(v_context);
318 //printf("Set sync cycle to: %d @ %d, vcounter: %d, hslot: %d\n", context->sync_cycle, context->current_cycle, v_context->vcounter, v_context->hslot);
320 adjust_int_cycle(context, v_context); 319 adjust_int_cycle(context, v_context);
321 } 320 }
322 } else { 321 } else {
323 printf("Illegal write to HV Counter port %X\n", vdp_port); 322 printf("Illegal write to HV Counter port %X\n", vdp_port);
324 exit(1); 323 exit(1);