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comparison vdp.c @ 189:806c3b7a6f2a

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Fix background rendering when display is off and improve refresh cycle emulation so that direct color DMA demos work
author Mike Pavone <pavone@retrodev.com>
date Mon, 14 Jan 2013 02:03:35 -0800
parents 8b846bcff6a2
children 4cb8a3891e26
comparison
equal deleted inserted replaced
188:062e3aa549eb 189:806c3b7a6f2a
908 int is_refresh(vdp_context * context) 908 int is_refresh(vdp_context * context)
909 { 909 {
910 uint32_t linecyc = context->cycles % MCLKS_LINE; 910 uint32_t linecyc = context->cycles % MCLKS_LINE;
911 if (context->latched_mode & BIT_H40) { 911 if (context->latched_mode & BIT_H40) {
912 linecyc = linecyc/16; 912 linecyc = linecyc/16;
913 return (linecyc == 73 || linecyc == 105 || linecyc == 137 || linecyc == 169 || linecyc == 201); 913 //TODO: Figure out the exact behavior that reduces DMA slots for direct color DMA demos
914 return (linecyc == 37 || linecyc == 69 || linecyc == 102 || linecyc == 133 || linecyc == 165 || linecyc == 197 || linecyc >= 210 || (linecyc < 6 && (context->flags & FLAG_DMA_RUN) && ((context->dma_cd & 0xF) == CRAM_WRITE)));
914 } else { 915 } else {
915 linecyc = linecyc/20; 916 linecyc = linecyc/20;
917 //TODO: Figure out which slots are refresh when display is off in 32-cell mode
918 //The numbers below are the refresh slots during active display
916 return (linecyc == 66 || linecyc == 98 || linecyc == 130 || linecyc == 162); 919 return (linecyc == 66 || linecyc == 98 || linecyc == 130 || linecyc == 162);
917 } 920 }
918 } 921 }
919 922
920 void check_render_bg(vdp_context * context, int32_t line) 923 void check_render_bg(vdp_context * context, int32_t line)
923 line -= 1; 926 line -= 1;
924 uint16_t * start = NULL, *end = NULL; 927 uint16_t * start = NULL, *end = NULL;
925 uint32_t linecyc = (context->cycles % MCLKS_LINE); 928 uint32_t linecyc = (context->cycles % MCLKS_LINE);
926 if (context->latched_mode & BIT_H40) { 929 if (context->latched_mode & BIT_H40) {
927 linecyc /= 16; 930 linecyc /= 16;
928 if (linecyc >= 55 && linecyc <= 207 && !((linecyc-55) % 8)) { 931 if (linecyc >= 50 && linecyc < 210) {
929 uint32_t x = ((linecyc-55)&(~0xF))*2; 932 uint32_t x = ((linecyc-50)&(~0x1))*2;
930 start = context->framebuf + line * 320 + x; 933 start = context->framebuf + line * 320 + x;
931 end = start + 16; 934 end = start + 4;
932 } 935 }
933 } else { 936 } else {
934 linecyc /= 20; 937 linecyc /= 20;
935 if (linecyc >= 48 && linecyc <= 168 && !((linecyc-48) % 8)) { 938 if (linecyc >= 43 && linecyc < 171) {
936 uint32_t x = ((linecyc-48)&(~0xF))*2; 939 uint32_t x = ((linecyc-48)&(~0x1))*2;
937 start = context->framebuf + line * 256 + x; 940 start = context->framebuf + line * 256 + x;
938 end = start + 16; 941 end = start + 4;
939 } 942 }
940 } 943 }
944 uint16_t color = context->cram[context->regs[REG_BG_COLOR] & 0x3F];
941 while (start != end) { 945 while (start != end) {
942 *start = context->regs[REG_BG_COLOR] & 0x3F; 946 *start = color;
943 ++start; 947 ++start;
944 } 948 }
945 } 949 }
946 } 950 }
947 951