comparison cpu_dsl.py @ 1878:881083d76212

Small optimization to render_normal and a minor bugfix in left border debug register handling
author Michael Pavone <pavone@retrodev.com>
date Tue, 20 Aug 2019 20:18:27 -0700
parents 0c1491818f4b
children 9ab5184811ea
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1877:9486236f28ac 1878:881083d76212