comparison blastem.c @ 671:8ad39a2b0bce

Fix bank area access delay for master clock change
author Michael Pavone <pavone@retrodev.com>
date Sat, 03 Jan 2015 20:13:51 -0800
parents f4f3e74b0ce6
children 18ef3b61e70b
comparison
equal deleted inserted replaced
670:f4f3e74b0ce6 671:8ad39a2b0bce
665 665
666 uint8_t z80_read_bank(uint32_t location, void * vcontext) 666 uint8_t z80_read_bank(uint32_t location, void * vcontext)
667 { 667 {
668 z80_context * context = vcontext; 668 z80_context * context = vcontext;
669 //typical delay from bus arbitration 669 //typical delay from bus arbitration
670 context->current_cycle += 3; 670 context->current_cycle += 3 * MCLKS_PER_Z80;
671 671
672 location &= 0x7FFF; 672 location &= 0x7FFF;
673 //TODO: add cycle for an access right after a previous one 673 //TODO: add cycle for an access right after a previous one
674 //TODO: block Z80 if VDP has the bus or the 68K is blocked on a VDP access 674 //TODO: block Z80 if VDP has the bus or the 68K is blocked on a VDP access
675 if (context->mem_pointers[1]) { 675 if (context->mem_pointers[1]) {
686 686
687 void *z80_write_bank(uint32_t location, void * vcontext, uint8_t value) 687 void *z80_write_bank(uint32_t location, void * vcontext, uint8_t value)
688 { 688 {
689 z80_context * context = vcontext; 689 z80_context * context = vcontext;
690 //typical delay from bus arbitration 690 //typical delay from bus arbitration
691 context->current_cycle += 3; 691 context->current_cycle += 3 * MCLKS_PER_Z80;
692 location &= 0x7FFF; 692 location &= 0x7FFF;
693 //TODO: add cycle for an access right after a previous one 693 //TODO: add cycle for an access right after a previous one
694 //TODO: block Z80 if VDP has the bus or the 68K is blocked on a VDP access 694 //TODO: block Z80 if VDP has the bus or the 68K is blocked on a VDP access
695 uint32_t address = context->bank_reg << 15 | location; 695 uint32_t address = context->bank_reg << 15 | location;
696 if (address >= 0xE00000) { 696 if (address >= 0xE00000) {