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comparison m68k_core_x86.c @ 2240:8e8db9141209

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Fix crash regression in m68k bit instruction implementation
author Michael Pavone <pavone@retrodev.com>
date Wed, 21 Sep 2022 23:16:39 -0700
parents 0c42982dd4d8
children 5b308c7b098c
comparison
equal deleted inserted replaced
2239:b2f788f08a31 2240:8e8db9141209
1670 and_ir(code, 7, src_op->base, SZ_D); 1670 and_ir(code, 7, src_op->base, SZ_D);
1671 size = SZ_D; 1671 size = SZ_D;
1672 } 1672 }
1673 if (inst->op != M68K_BTST && inst->extra.size != OPSIZE_BYTE) { 1673 if (inst->op != M68K_BTST && inst->extra.size != OPSIZE_BYTE) {
1674 //bit operations that need to save the result have a 2 cycle penalty when operating on the upper word 1674 //bit operations that need to save the result have a 2 cycle penalty when operating on the upper word
1675 1675 cmp_ir(code, 16, src_op->base, SZ_B);
1676 if (src_op->mode == MODE_REG_DISPLACE8) {
1677 cmp_irdisp(code, 16, src_op->base, src_op->disp, SZ_B);
1678 } else {
1679 cmp_ir(code, 16, src_op->base, SZ_B);
1680 }
1681 code_ptr jmp_off = code->cur + 1; 1676 code_ptr jmp_off = code->cur + 1;
1682 jcc(code, CC_C, jmp_off + 1); 1677 jcc(code, CC_C, jmp_off + 1);
1683 cycles(&opts->gen, 2); 1678 cycles(&opts->gen, 2);
1684 *jmp_off = code->cur - (jmp_off + 1); 1679 *jmp_off = code->cur - (jmp_off + 1);
1685 } 1680 }