comparison segacd.h @ 2054:8ee7ecbf3f21 segacd

Implement enough of Sega CD gate array and Sub CPU to pass Sik's Mode 1 test ROM
author Michael Pavone <pavone@retrodev.com>
date Tue, 18 Jan 2022 00:03:50 -0800
parents a763523dadf4
children 70260f6051dd
comparison
equal deleted inserted replaced
2053:3414a4423de1 2054:8ee7ecbf3f21
1 #ifndef SEGACD_H_ 1 #ifndef SEGACD_H_
2 #define SEGACD_H_ 2 #define SEGACD_H_
3 #include <stdint.h> 3 #include <stdint.h>
4 #include "system.h" 4 #include "genesis.h"
5 #include "m68k_core.h"
6 5
7 typedef struct { 6 typedef struct {
8 m68k_context *m68k; 7 m68k_context *m68k;
9 system_media *media; 8 system_media *media;
10 uint16_t gate_array[0x100]; 9 genesis_context *genesis;
11 uint8_t busreq; 10 uint16_t gate_array[0x100];
12 uint8_t busack; 11 uint16_t *rom; //unaltered ROM, needed for mirrored locations
13 uint8_t reset; 12 uint16_t *rom_mut; //ROM with low 16-bit of HINT vector modified by register write
14 uint16_t *rom; //unaltered ROM, needed for mirrored locations 13 uint16_t *prog_ram;
15 uint16_t *rom_mut; //ROM with low 16-bit of HINT vector modified by register write 14 uint16_t *word_ram;
16 uint16_t *prog_ram; 15 uint8_t *pcm_ram;
17 uint16_t *work_ram; 16 uint8_t *bram;
18 uint8_t *pcm_ram; 17 uint32_t stopwatch_cycle;
19 uint8_t *bram; 18 uint32_t int2_cycle;
19 uint32_t periph_reset_cycle;
20 uint32_t base;
21 uint8_t timer_pending;
22 uint8_t timer_value;
23 uint8_t busreq;
24 uint8_t busack;
25 uint8_t reset;
26 uint8_t need_reset;
27 uint8_t memptr_start_index;
20 } segacd_context; 28 } segacd_context;
21 29
22 segacd_context *alloc_configure_segacd(system_media *media, uint32_t opts, uint8_t force_region, rom_info *info); 30 segacd_context *alloc_configure_segacd(system_media *media, uint32_t opts, uint8_t force_region, rom_info *info);
23 memmap_chunk *segacd_main_cpu_map(segacd_context *cd, uint32_t *num_chunks); 31 memmap_chunk *segacd_main_cpu_map(segacd_context *cd, uint8_t cart_boot, uint32_t *num_chunks);
32 uint32_t gen_cycle_to_scd(uint32_t cycle, genesis_context *gen);
33 void scd_run(segacd_context *cd, uint32_t cycle);
34 void scd_adjust_cycle(segacd_context *cd, uint32_t deduction);
24 35
25 #endif //SEGACD_H_ 36 #endif //SEGACD_H_