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comparison ztestrun.c @ 1130:8f14767661fa

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Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
author Michael Pavone <pavone@retrodev.com>
date Wed, 28 Dec 2016 20:39:27 -0800
parents fe8c79f82c22
children 49a52c737bf0
comparison
equal deleted inserted replaced
1129:6b5c92b6205c 1130:8f14767661fa
32 { 32 {
33 return context; 33 return context;
34 } 34 }
35 35
36 const memmap_chunk z80_map[] = { 36 const memmap_chunk z80_map[] = {
37 { 0x0000, 0x4000, 0x1FFF, 0, MMAP_READ | MMAP_WRITE | MMAP_CODE, z80_ram, NULL, NULL, NULL, NULL }, 37 { 0x0000, 0x4000, 0x1FFF, 0, 0, MMAP_READ | MMAP_WRITE | MMAP_CODE, z80_ram, NULL, NULL, NULL, NULL },
38 { 0x4000, 0x10000, 0xFFFF, 0, 0, NULL, NULL, NULL, z80_unmapped_read, z80_unmapped_write} 38 { 0x4000, 0x10000, 0xFFFF, 0, 0, 0, NULL, NULL, NULL, z80_unmapped_read, z80_unmapped_write}
39 }; 39 };
40 40
41 const memmap_chunk port_map[] = { 41 const memmap_chunk port_map[] = {
42 { 0x0000, 0x100, 0xFF, 0, 0, NULL, NULL, NULL, z80_unmapped_read, z80_unmapped_write} 42 { 0x0000, 0x100, 0xFF, 0, 0, 0, NULL, NULL, NULL, z80_unmapped_read, z80_unmapped_write}
43 }; 43 };
44 44
45 void z80_next_int_pulse(z80_context * context) 45 void z80_next_int_pulse(z80_context * context)
46 { 46 {
47 context->int_pulse_start = context->int_pulse_end = CYCLE_NEVER; 47 context->int_pulse_start = context->int_pulse_end = CYCLE_NEVER;
50 int main(int argc, char ** argv) 50 int main(int argc, char ** argv)
51 { 51 {
52 long filesize; 52 long filesize;
53 uint8_t *filebuf; 53 uint8_t *filebuf;
54 z80_options opts; 54 z80_options opts;
55 z80_context context; 55 z80_context *context;
56 char *fname = NULL; 56 char *fname = NULL;
57 uint8_t retranslate = 0; 57 uint8_t retranslate = 0;
58 for (int i = 1; i < argc; i++) 58 for (int i = 1; i < argc; i++)
59 { 59 {
60 if (argv[i][0] == '-') { 60 if (argv[i][0] == '-') {
88 fprintf(stderr, "error reading %s\n",fname); 88 fprintf(stderr, "error reading %s\n",fname);
89 exit(1); 89 exit(1);
90 } 90 }
91 fclose(f); 91 fclose(f);
92 init_z80_opts(&opts, z80_map, 2, port_map, 1, 1, 0xFF); 92 init_z80_opts(&opts, z80_map, 2, port_map, 1, 1, 0xFF);
93 init_z80_context(&context, &opts); 93 context = init_z80_context(&opts);
94 //Z80 RAM 94 //Z80 RAM
95 context.mem_pointers[0] = z80_ram; 95 context->mem_pointers[0] = z80_ram;
96 if (retranslate) { 96 if (retranslate) {
97 //run core long enough to translate code 97 //run core long enough to translate code
98 z80_run(&context, 1); 98 z80_run(context, 1);
99 for (int i = 0; i < filesize; i++) 99 for (int i = 0; i < filesize; i++)
100 { 100 {
101 z80_handle_code_write(i, &context); 101 z80_handle_code_write(i, context);
102 } 102 }
103 z80_assert_reset(&context, context.current_cycle); 103 z80_assert_reset(context, context->current_cycle);
104 z80_clear_reset(&context, context.current_cycle + 3); 104 z80_clear_reset(context, context->current_cycle + 3);
105 z80_adjust_cycles(&context, context.current_cycle); 105 z80_adjust_cycles(context, context->current_cycle);
106 } 106 }
107 z80_run(&context, 1000); 107 z80_run(context, 1000);
108 printf("A: %X\nB: %X\nC: %X\nD: %X\nE: %X\nHL: %X\nIX: %X\nIY: %X\nSP: %X\n\nIM: %d, IFF1: %d, IFF2: %d\n", 108 printf("A: %X\nB: %X\nC: %X\nD: %X\nE: %X\nHL: %X\nIX: %X\nIY: %X\nSP: %X\n\nIM: %d, IFF1: %d, IFF2: %d\n",
109 context.regs[Z80_A], context.regs[Z80_B], context.regs[Z80_C], 109 context->regs[Z80_A], context->regs[Z80_B], context->regs[Z80_C],
110 context.regs[Z80_D], context.regs[Z80_E], 110 context->regs[Z80_D], context->regs[Z80_E],
111 (context.regs[Z80_H] << 8) | context.regs[Z80_L], 111 (context->regs[Z80_H] << 8) | context->regs[Z80_L],
112 (context.regs[Z80_IXH] << 8) | context.regs[Z80_IXL], 112 (context->regs[Z80_IXH] << 8) | context->regs[Z80_IXL],
113 (context.regs[Z80_IYH] << 8) | context.regs[Z80_IYL], 113 (context->regs[Z80_IYH] << 8) | context->regs[Z80_IYL],
114 context.sp, context.im, context.iff1, context.iff2); 114 context->sp, context->im, context->iff1, context->iff2);
115 printf("Flags: SZYHXVNC\n" 115 printf("Flags: SZYHXVNC\n"
116 " %d%d%d%d%d%d%d%d\n", 116 " %d%d%d%d%d%d%d%d\n",
117 context.flags[ZF_S], context.flags[ZF_Z], context.flags[ZF_XY] >> 5 & 1, context.flags[ZF_H], 117 context->flags[ZF_S], context->flags[ZF_Z], context->flags[ZF_XY] >> 5 & 1, context->flags[ZF_H],
118 context.flags[ZF_XY] >> 3 & 1, context.flags[ZF_PV], context.flags[ZF_N], context.flags[ZF_C] 118 context->flags[ZF_XY] >> 3 & 1, context->flags[ZF_PV], context->flags[ZF_N], context->flags[ZF_C]
119 ); 119 );
120 puts("--Alternate Regs--"); 120 puts("--Alternate Regs--");
121 printf("A: %X\nB: %X\nC: %X\nD: %X\nE: %X\nHL: %X\n", 121 printf("A: %X\nB: %X\nC: %X\nD: %X\nE: %X\nHL: %X\n",
122 context.alt_regs[Z80_A], context.alt_regs[Z80_B], context.alt_regs[Z80_C], 122 context->alt_regs[Z80_A], context->alt_regs[Z80_B], context->alt_regs[Z80_C],
123 context.alt_regs[Z80_D], context.alt_regs[Z80_E], 123 context->alt_regs[Z80_D], context->alt_regs[Z80_E],
124 (context.alt_regs[Z80_H] << 8) | context.alt_regs[Z80_L]); 124 (context->alt_regs[Z80_H] << 8) | context->alt_regs[Z80_L]);
125 return 0; 125 return 0;
126 } 126 }