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Fix bug that was causing DMA fills to lock up under certain circumstances
author Mike Pavone <pavone@retrodev.com>
date Sun, 30 Dec 2012 01:15:16 -0800
parents 004dd46e0a97
children a81c548cf353
comparison
equal deleted inserted replaced
130:0bdbffa9fe90 131:8fc8e46be691
189 switch(context->regs[REG_DMASRC_H] & 0xC0) 189 switch(context->regs[REG_DMASRC_H] & 0xC0)
190 { 190 {
191 //68K -> VDP 191 //68K -> VDP
192 case 0: 192 case 0:
193 case 0x40: 193 case 0x40:
194 switch(context->cd & 0xF) 194 switch(context->dma_cd & 0xF)
195 { 195 {
196 case VRAM_WRITE: 196 case VRAM_WRITE:
197 if (context->flags & FLAG_DMA_PROG) { 197 if (context->flags & FLAG_DMA_PROG) {
198 context->vdpmem[context->address ^ 1] = context->dma_val; 198 context->vdpmem[context->address ^ 1] = context->dma_val;
199 context->flags &= ~FLAG_DMA_PROG; 199 context->flags &= ~FLAG_DMA_PROG;
213 break; 213 break;
214 } 214 }
215 break; 215 break;
216 //Fill 216 //Fill
217 case 0x80: 217 case 0x80:
218 switch(context->cd & 0xF) 218 switch(context->dma_cd & 0xF)
219 { 219 {
220 case VRAM_WRITE: 220 case VRAM_WRITE:
221 //Charles MacDonald's VDP doc says that the low byte gets written first 221 //Charles MacDonald's VDP doc says that the low byte gets written first
222 //this doesn't make a lot of sense to me, but until I've had a change to 222 //this doesn't make a lot of sense to me, but until I've had a change to
223 //verify it myself, I'll assume it's true 223 //verify it myself, I'll assume it's true
241 } 241 }
242 break; 242 break;
243 //Copy 243 //Copy
244 case 0xC0: 244 case 0xC0:
245 if (context->flags & FLAG_DMA_PROG) { 245 if (context->flags & FLAG_DMA_PROG) {
246 switch(context->cd & 0xF) 246 switch(context->dma_cd & 0xF)
247 { 247 {
248 case VRAM_WRITE: 248 case VRAM_WRITE:
249 context->vdpmem[context->address] = context->dma_val; 249 context->vdpmem[context->address] = context->dma_val;
250 break; 250 break;
251 case CRAM_WRITE: 251 case CRAM_WRITE:
259 } 259 }
260 context->flags &= ~FLAG_DMA_PROG; 260 context->flags &= ~FLAG_DMA_PROG;
261 } else { 261 } else {
262 //I assume, that DMA copy copies from the same RAM as the destination 262 //I assume, that DMA copy copies from the same RAM as the destination
263 //but it's possible I'm mistaken 263 //but it's possible I'm mistaken
264 switch(context->cd & 0xF) 264 switch(context->dma_cd & 0xF)
265 { 265 {
266 case VRAM_WRITE: 266 case VRAM_WRITE:
267 context->dma_val = context->vdpmem[(context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]]; 267 context->dma_val = context->vdpmem[(context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]];
268 break; 268 break;
269 case CRAM_WRITE: 269 case CRAM_WRITE:
295 fifo_entry * start = (context->fifo_end - FIFO_SIZE); 295 fifo_entry * start = (context->fifo_end - FIFO_SIZE);
296 if (context->fifo_cur != start && start->cycle <= context->cycles) { 296 if (context->fifo_cur != start && start->cycle <= context->cycles) {
297 if ((context->regs[REG_MODE_2] & BIT_DMA_ENABLE) && (context->cd & DMA_START)) { 297 if ((context->regs[REG_MODE_2] & BIT_DMA_ENABLE) && (context->cd & DMA_START)) {
298 context->flags |= FLAG_DMA_RUN; 298 context->flags |= FLAG_DMA_RUN;
299 context->dma_val = start->value; 299 context->dma_val = start->value;
300 context->dma_cd = context->cd;
300 } else { 301 } else {
301 switch (context->cd & 0xF) 302 switch (context->cd & 0xF)
302 { 303 {
303 case VRAM_WRITE: 304 case VRAM_WRITE:
304 if (start->partial) { 305 if (start->partial) {
1032 //printf("New Address: %X, New CD: %X\n", context->address, context->cd); 1033 //printf("New Address: %X, New CD: %X\n", context->address, context->cd);
1033 if (context->cd & 0x20) { 1034 if (context->cd & 0x20) {
1034 if((context->regs[REG_DMASRC_H] & 0xC0) != 0x80) { 1035 if((context->regs[REG_DMASRC_H] & 0xC0) != 0x80) {
1035 //DMA copy or 68K -> VDP, transfer starts immediately 1036 //DMA copy or 68K -> VDP, transfer starts immediately
1036 context->flags |= FLAG_DMA_RUN; 1037 context->flags |= FLAG_DMA_RUN;
1038 context->dma_cd = context->cd;
1037 if (!(context->regs[REG_DMASRC_H] & 0x80)) { 1039 if (!(context->regs[REG_DMASRC_H] & 0x80)) {
1038 return 1; 1040 return 1;
1039 } 1041 }
1040 } 1042 }
1041 } 1043 }