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comparison blastem.c @ 891:90d54ccf9557

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Fix a bad interaction between the implementation of STOP and the way interrupt cycles are calculated. Prevent addition of refresh delays while VDP has the bus.
author Michael Pavone <pavone@retrodev.com>
date Tue, 17 Nov 2015 19:55:59 -0800
parents 2d1122123fe9
children a5a51465f8b0
comparison
equal deleted inserted replaced
890:12b1a8a32306 891:90d54ccf9557
173 }*/ 173 }*/
174 174
175 context->target_cycle = context->int_cycle < context->sync_cycle ? context->int_cycle : context->sync_cycle; 175 context->target_cycle = context->int_cycle < context->sync_cycle ? context->int_cycle : context->sync_cycle;
176 if (context->should_return) { 176 if (context->should_return) {
177 context->target_cycle = context->current_cycle; 177 context->target_cycle = context->current_cycle;
178 } else if (context->target_cycle < context->current_cycle) {
179 //Changes to SR can result in an interrupt cycle that's in the past
180 //This can cause issues with the implementation of STOP though
181 context->target_cycle = context->current_cycle;
178 } 182 }
179 /*printf("Cyc: %d, Trgt: %d, Int Cyc: %d, Int: %d, Mask: %X, V: %d, H: %d, HICount: %d, HReg: %d, Line: %d\n", 183 /*printf("Cyc: %d, Trgt: %d, Int Cyc: %d, Int: %d, Mask: %X, V: %d, H: %d, HICount: %d, HReg: %d, Line: %d\n",
180 context->current_cycle, context->target_cycle, context->int_cycle, context->int_num, (context->status & 0x7), 184 context->current_cycle, context->target_cycle, context->int_cycle, context->int_num, (context->status & 0x7),
181 v_context->regs[REG_MODE_2] & 0x20, v_context->regs[REG_MODE_1] & 0x10, v_context->hint_counter, v_context->regs[REG_HINT], v_context->cycles / MCLKS_LINE);*/ 185 v_context->regs[REG_MODE_2] & 0x20, v_context->regs[REG_MODE_1] & 0x10, v_context->hint_counter, v_context->regs[REG_HINT], v_context->cycles / MCLKS_LINE);*/
182 } 186 }
239 { 243 {
240 genesis_context * gen = context->system; 244 genesis_context * gen = context->system;
241 vdp_context * v_context = gen->vdp; 245 vdp_context * v_context = gen->vdp;
242 z80_context * z_context = gen->z80; 246 z80_context * z_context = gen->z80;
243 //lame estimation of refresh cycle delay 247 //lame estimation of refresh cycle delay
244 refresh_counter += context->current_cycle - last_sync_cycle; 248 if (!gen->bus_busy) {
245 context->current_cycle += REFRESH_DELAY * MCLKS_PER_68K * (refresh_counter / (MCLKS_PER_68K * REFRESH_INTERVAL)); 249 refresh_counter += context->current_cycle - last_sync_cycle;
246 refresh_counter = refresh_counter % (MCLKS_PER_68K * REFRESH_INTERVAL); 250 context->current_cycle += REFRESH_DELAY * MCLKS_PER_68K * (refresh_counter / (MCLKS_PER_68K * REFRESH_INTERVAL));
251 refresh_counter = refresh_counter % (MCLKS_PER_68K * REFRESH_INTERVAL);
252 }
247 253
248 uint32_t mclks = context->current_cycle; 254 uint32_t mclks = context->current_cycle;
249 sync_z80(z_context, mclks); 255 sync_z80(z_context, mclks);
250 sync_sound(gen, mclks); 256 sync_sound(gen, mclks);
251 vdp_run_context(v_context, mclks); 257 vdp_run_context(v_context, mclks);