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comparison z80_to_x86.c @ 294:921f9d8819da

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Fix byte order of pop AF
author Mike Pavone <pavone@retrodev.com>
date Wed, 08 May 2013 17:32:28 -0700
parents b970ea214ecb
children dba661846579
comparison
equal deleted inserted replaced
293:ba97772b1662 294:921f9d8819da
385 dst = zcycles(dst, (inst->reg == Z80_IX || inst->reg == Z80_IY) ? 8 : 4); 385 dst = zcycles(dst, (inst->reg == Z80_IX || inst->reg == Z80_IY) ? 8 : 4);
386 dst = mov_rr(dst, opts->regs[Z80_SP], SCRATCH1, SZ_W); 386 dst = mov_rr(dst, opts->regs[Z80_SP], SCRATCH1, SZ_W);
387 dst = call(dst, (uint8_t *)z80_read_word); 387 dst = call(dst, (uint8_t *)z80_read_word);
388 dst = add_ir(dst, 2, opts->regs[Z80_SP], SZ_W); 388 dst = add_ir(dst, 2, opts->regs[Z80_SP], SZ_W);
389 if (inst->reg == Z80_AF) { 389 if (inst->reg == Z80_AF) {
390
391 dst = bt_ir(dst, 0, SCRATCH1, SZ_W);
392 dst = setcc_rdisp8(dst, CC_C, CONTEXT, zf_off(ZF_C));
393 dst = bt_ir(dst, 1, SCRATCH1, SZ_W);
394 dst = setcc_rdisp8(dst, CC_C, CONTEXT, zf_off(ZF_N));
395 dst = bt_ir(dst, 2, SCRATCH1, SZ_W);
396 dst = setcc_rdisp8(dst, CC_C, CONTEXT, zf_off(ZF_PV));
397 dst = bt_ir(dst, 4, SCRATCH1, SZ_W);
398 dst = setcc_rdisp8(dst, CC_C, CONTEXT, zf_off(ZF_H));
399 dst = bt_ir(dst, 6, SCRATCH1, SZ_W);
400 dst = setcc_rdisp8(dst, CC_C, CONTEXT, zf_off(ZF_Z));
401 dst = bt_ir(dst, 7, SCRATCH1, SZ_W);
402 dst = setcc_rdisp8(dst, CC_C, CONTEXT, zf_off(ZF_S));
403 dst = shr_ir(dst, 8, SCRATCH1, SZ_W);
390 dst = mov_rr(dst, SCRATCH1, opts->regs[Z80_A], SZ_B); 404 dst = mov_rr(dst, SCRATCH1, opts->regs[Z80_A], SZ_B);
391 dst = bt_ir(dst, 8, SCRATCH1, SZ_W);
392 dst = setcc_rdisp8(dst, CC_C, CONTEXT, zf_off(ZF_C));
393 dst = bt_ir(dst, 9, SCRATCH1, SZ_W);
394 dst = setcc_rdisp8(dst, CC_C, CONTEXT, zf_off(ZF_N));
395 dst = bt_ir(dst, 10, SCRATCH1, SZ_W);
396 dst = setcc_rdisp8(dst, CC_C, CONTEXT, zf_off(ZF_PV));
397 dst = bt_ir(dst, 12, SCRATCH1, SZ_W);
398 dst = setcc_rdisp8(dst, CC_C, CONTEXT, zf_off(ZF_H));
399 dst = bt_ir(dst, 14, SCRATCH1, SZ_W);
400 dst = setcc_rdisp8(dst, CC_C, CONTEXT, zf_off(ZF_Z));
401 dst = bt_ir(dst, 15, SCRATCH1, SZ_W);
402 dst = setcc_rdisp8(dst, CC_C, CONTEXT, zf_off(ZF_S));
403 } else { 405 } else {
404 dst = translate_z80_reg(inst, &src_op, dst, opts); 406 dst = translate_z80_reg(inst, &src_op, dst, opts);
405 dst = mov_rr(dst, SCRATCH1, src_op.base, SZ_W); 407 dst = mov_rr(dst, SCRATCH1, src_op.base, SZ_W);
406 } 408 }
407 //no call to save_z80_reg needed since there's no chance we'll use the only 409 //no call to save_z80_reg needed since there's no chance we'll use the only