Mercurial > repos > blastem
comparison cpu_dsl.py @ 1883:9ab5184811ea
Implement interrupts in call dispatch mode in CPU DSL
author | Michael Pavone <pavone@retrodev.com> |
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date | Sat, 21 Sep 2019 10:48:10 -0700 |
parents | 0c1491818f4b |
children | 1dae90605199 |
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1882:62e8a8833e39 | 1883:9ab5184811ea |
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1591 pieces.append('\nvoid {pre}execute({type} *context, uint32_t target_cycle)'.format(pre = self.prefix, type = self.context_type)) | 1591 pieces.append('\nvoid {pre}execute({type} *context, uint32_t target_cycle)'.format(pre = self.prefix, type = self.context_type)) |
1592 pieces.append('\n{') | 1592 pieces.append('\n{') |
1593 pieces.append('\n\t{sync}(context, target_cycle);'.format(sync=self.sync_cycle)) | 1593 pieces.append('\n\t{sync}(context, target_cycle);'.format(sync=self.sync_cycle)) |
1594 pieces.append('\n\twhile (context->cycles < target_cycle)') | 1594 pieces.append('\n\twhile (context->cycles < target_cycle)') |
1595 pieces.append('\n\t{') | 1595 pieces.append('\n\t{') |
1596 #TODO: Handle interrupts in call dispatch mode | 1596 if self.interrupt in self.subroutines: |
1597 pieces.append('\n\t\tif (context->cycles >= context->sync_cycle) {') | |
1598 self.meta = {} | |
1599 self.temp = {} | |
1600 self.subroutines[self.interrupt].inline(self, [], pieces, otype, None) | |
1601 pieces.append('\n\t\t}') | |
1597 self.meta = {} | 1602 self.meta = {} |
1598 self.temp = {} | 1603 self.temp = {} |
1599 self.subroutines[self.body].inline(self, [], pieces, otype, None) | 1604 self.subroutines[self.body].inline(self, [], pieces, otype, None) |
1600 pieces.append('\n\t}') | 1605 pieces.append('\n\t}') |
1601 pieces.append('\n}') | 1606 pieces.append('\n}') |