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comparison segacd.h @ 2134:9caebcfeac72

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Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
author Michael Pavone <pavone@retrodev.com>
date Fri, 18 Mar 2022 20:49:07 -0700
parents 5ec2f97365a2
children 2da377ea932f
comparison
equal deleted inserted replaced
2133:8554751f17b5 2134:9caebcfeac72
45 uint8_t graphics_dst_y; 45 uint8_t graphics_dst_y;
46 uint8_t enter_debugger; 46 uint8_t enter_debugger;
47 uint8_t main_has_word2m; 47 uint8_t main_has_word2m;
48 uint8_t main_swap_request; 48 uint8_t main_swap_request;
49 uint8_t bank_toggle; 49 uint8_t bank_toggle;
50 uint8_t sub_paused_wordram;
50 } segacd_context; 51 } segacd_context;
51 52
52 segacd_context *alloc_configure_segacd(system_media *media, uint32_t opts, uint8_t force_region, rom_info *info); 53 segacd_context *alloc_configure_segacd(system_media *media, uint32_t opts, uint8_t force_region, rom_info *info);
53 memmap_chunk *segacd_main_cpu_map(segacd_context *cd, uint8_t cart_boot, uint32_t *num_chunks); 54 memmap_chunk *segacd_main_cpu_map(segacd_context *cd, uint8_t cart_boot, uint32_t *num_chunks);
54 uint32_t gen_cycle_to_scd(uint32_t cycle, genesis_context *gen); 55 uint32_t gen_cycle_to_scd(uint32_t cycle, genesis_context *gen);