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Implement savestate support for Sega CD
author Michael Pavone <pavone@retrodev.com>
date Sun, 08 Jan 2023 14:42:24 -0800
parents 5a21bc0ec583
children b9fed07f19e4
comparison
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2279:3b5fef896475 2280:9ead0fe69d9b
2 #define SEGACD_H_ 2 #define SEGACD_H_
3 #include <stdint.h> 3 #include <stdint.h>
4 #include "genesis.h" 4 #include "genesis.h"
5 #include "cdd_mcu.h" 5 #include "cdd_mcu.h"
6 #include "rf5c164.h" 6 #include "rf5c164.h"
7 #include "serialize.h"
7 8
8 typedef struct { 9 typedef struct {
9 m68k_context *m68k; 10 m68k_context *m68k;
10 system_media *media; 11 system_media *media;
11 genesis_context *genesis; 12 genesis_context *genesis;
12 uint16_t gate_array[0xC0]; 13 uint16_t gate_array[0xC0];
13 uint16_t *rom; //unaltered ROM, needed for mirrored locations 14 uint16_t *rom; //unaltered ROM, needed for mirrored locations
14 uint16_t *rom_mut; //ROM with low 16-bit of HINT vector modified by register write 15 uint16_t *rom_mut; //ROM with low 16-bit of HINT vector modified by register write
15 uint16_t *prog_ram; 16 uint16_t *prog_ram;
16 uint16_t *word_ram; 17 uint16_t *word_ram;
17 uint8_t *pcm_ram;
18 uint8_t *bram; 18 uint8_t *bram;
19 uint32_t stopwatch_cycle; 19 uint32_t stopwatch_cycle;
20 uint32_t int2_cycle; 20 uint32_t int2_cycle;
21 uint32_t graphics_int_cycle; 21 uint32_t graphics_int_cycle;
22 uint32_t periph_reset_cycle; 22 uint32_t periph_reset_cycle;
23 uint32_t last_refresh_cycle; 23 uint32_t last_refresh_cycle;
24 uint32_t graphics_cycle; 24 uint32_t graphics_cycle;
25 uint32_t base; 25 uint32_t base;
26 uint32_t m68k_pc;
26 uint32_t graphics_x; 27 uint32_t graphics_x;
27 uint32_t graphics_y; 28 uint32_t graphics_y;
28 uint32_t graphics_dx; 29 uint32_t graphics_dx;
29 uint32_t graphics_dy; 30 uint32_t graphics_dy;
30 uint16_t graphics_dst_x; 31 uint16_t graphics_dst_x;
35 uint8_t busreq; 36 uint8_t busreq;
36 uint8_t busack; 37 uint8_t busack;
37 uint8_t reset; 38 uint8_t reset;
38 uint8_t need_reset; 39 uint8_t need_reset;
39 uint8_t memptr_start_index; 40 uint8_t memptr_start_index;
40 rf5c164 pcm;
41 lc8951 cdc;
42 cdd_mcu cdd;
43 cdd_fader fader;
44 uint8_t cdc_dst_low; 41 uint8_t cdc_dst_low;
45 uint8_t cdc_int_ack; 42 uint8_t cdc_int_ack;
46 uint8_t graphics_step; 43 uint8_t graphics_step;
47 uint8_t graphics_dst_y; 44 uint8_t graphics_dst_y;
48 uint8_t enter_debugger; 45 uint8_t enter_debugger;
49 uint8_t main_has_word2m; 46 uint8_t main_has_word2m;
50 uint8_t main_swap_request; 47 uint8_t main_swap_request;
51 uint8_t bank_toggle; 48 uint8_t bank_toggle;
52 uint8_t sub_paused_wordram; 49 uint8_t sub_paused_wordram;
50 rf5c164 pcm;
51 lc8951 cdc;
52 cdd_mcu cdd;
53 cdd_fader fader;
53 } segacd_context; 54 } segacd_context;
54 55
55 segacd_context *alloc_configure_segacd(system_media *media, uint32_t opts, uint8_t force_region, rom_info *info); 56 segacd_context *alloc_configure_segacd(system_media *media, uint32_t opts, uint8_t force_region, rom_info *info);
56 void free_segacd(segacd_context *cd); 57 void free_segacd(segacd_context *cd);
57 memmap_chunk *segacd_main_cpu_map(segacd_context *cd, uint8_t cart_boot, uint32_t *num_chunks); 58 memmap_chunk *segacd_main_cpu_map(segacd_context *cd, uint8_t cart_boot, uint32_t *num_chunks);
58 uint32_t gen_cycle_to_scd(uint32_t cycle, genesis_context *gen); 59 uint32_t gen_cycle_to_scd(uint32_t cycle, genesis_context *gen);
59 void scd_run(segacd_context *cd, uint32_t cycle); 60 void scd_run(segacd_context *cd, uint32_t cycle);
60 void scd_adjust_cycle(segacd_context *cd, uint32_t deduction); 61 void scd_adjust_cycle(segacd_context *cd, uint32_t deduction);
61 void scd_toggle_graphics_debug(segacd_context *cd); 62 void scd_toggle_graphics_debug(segacd_context *cd);
62 void segacd_set_speed_percent(segacd_context *cd, uint32_t percent); 63 void segacd_set_speed_percent(segacd_context *cd, uint32_t percent);
64 void segacd_serialize(segacd_context *cd, serialize_buffer *buf, uint8_t all);
65 void segacd_register_section_handlers(segacd_context *cd, deserialize_buffer *buf);
63 66
64 #endif //SEGACD_H_ 67 #endif //SEGACD_H_