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comparison z80_to_x86.c @ 506:a3b48a57e847

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Fix timing of certain ld and jp instructions in the Z80 core
author Michael Pavone <pavone@retrodev.com>
date Mon, 27 Jan 2014 22:12:22 -0800
parents b7b7a1cab44a
children 6b248602ab84 ea80559c67cb 6aa2a8ab9c70
comparison
equal deleted inserted replaced
505:b7b7a1cab44a 506:a3b48a57e847
344 case Z80_REG_INDIRECT: 344 case Z80_REG_INDIRECT:
345 cycles = size == SZ_B ? 4 : 6; 345 cycles = size == SZ_B ? 4 : 6;
346 if (inst->ea_reg == Z80_IX || inst->ea_reg == Z80_IY) { 346 if (inst->ea_reg == Z80_IX || inst->ea_reg == Z80_IY) {
347 cycles += 4; 347 cycles += 4;
348 } 348 }
349 if (inst->reg == Z80_I || inst->ea_reg == Z80_I) {
350 cycles += 5;
351 }
349 break; 352 break;
350 case Z80_IMMED: 353 case Z80_IMMED:
351 cycles = size == SZ_B ? 7 : 10; 354 cycles = size == SZ_B ? 7 : 10;
352 break; 355 break;
353 case Z80_IMMED_INDIRECT: 356 case Z80_IMMED_INDIRECT:
354 cycles = 10; 357 cycles = 10;
355 break; 358 break;
356 case Z80_IX_DISPLACE: 359 case Z80_IX_DISPLACE:
357 case Z80_IY_DISPLACE: 360 case Z80_IY_DISPLACE:
358 cycles = 12; 361 cycles = 16;
359 break; 362 break;
360 } 363 }
361 if ((inst->reg >= Z80_IXL && inst->reg <= Z80_IYH) || inst->reg == Z80_IX || inst->reg == Z80_IY) { 364 if ((inst->reg >= Z80_IXL && inst->reg <= Z80_IYH) || inst->reg == Z80_IX || inst->reg == Z80_IY) {
362 cycles += 4; 365 cycles += 4;
363 } 366 }
1310 } 1313 }
1311 break; 1314 break;
1312 } 1315 }
1313 case Z80_JP: { 1316 case Z80_JP: {
1314 cycles = 4; 1317 cycles = 4;
1315 if (inst->addr_mode != Z80_REG) { 1318 if (inst->addr_mode != Z80_REG_INDIRECT) {
1316 cycles += 6; 1319 cycles += 6;
1317 } else if(inst->ea_reg == Z80_IX || inst->ea_reg == Z80_IY) { 1320 } else if(inst->ea_reg == Z80_IX || inst->ea_reg == Z80_IY) {
1318 cycles += 4; 1321 cycles += 4;
1319 } 1322 }
1320 dst = zcycles(dst, cycles); 1323 dst = zcycles(dst, cycles);