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comparison vdp.c @ 58:a6a19c45d358

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Properly zero-init all VDP buffers. Comment out some debug printfs.
author Mike Pavone <pavone@retrodev.com>
date Tue, 18 Dec 2012 22:20:25 -0800
parents a28b1dfe1af2
children a6dd5b7a971b
comparison
equal deleted inserted replaced
57:bc3bc7a60c4e 58:a6a19c45d358
24 24
25 #define FIFO_SIZE 4 25 #define FIFO_SIZE 4
26 26
27 void init_vdp_context(vdp_context * context) 27 void init_vdp_context(vdp_context * context)
28 { 28 {
29 memset(context, 0, sizeof(context)); 29 memset(context, 0, sizeof(*context));
30 context->vdpmem = malloc(VRAM_SIZE); 30 context->vdpmem = malloc(VRAM_SIZE);
31 memset(context->vdpmem, 0, VRAM_SIZE);
31 context->framebuf = malloc(FRAMEBUF_SIZE); 32 context->framebuf = malloc(FRAMEBUF_SIZE);
32 memset(context->framebuf, 0, FRAMEBUF_SIZE); 33 memset(context->framebuf, 0, FRAMEBUF_SIZE);
33 context->linebuf = malloc(LINEBUF_SIZE + SCROLL_BUFFER_SIZE*2); 34 context->linebuf = malloc(LINEBUF_SIZE + SCROLL_BUFFER_SIZE*2);
34 memset(context->linebuf, 0, LINEBUF_SIZE + SCROLL_BUFFER_SIZE*2); 35 memset(context->linebuf, 0, LINEBUF_SIZE + SCROLL_BUFFER_SIZE*2);
35 context->tmp_buf_a = context->linebuf + LINEBUF_SIZE; 36 context->tmp_buf_a = context->linebuf + LINEBUF_SIZE;
189 if (context->fifo_cur != start && start->cycle <= context->cycles) { 190 if (context->fifo_cur != start && start->cycle <= context->cycles) {
190 switch (context->cd & 0x7) 191 switch (context->cd & 0x7)
191 { 192 {
192 case VRAM_WRITE: 193 case VRAM_WRITE:
193 if (start->partial) { 194 if (start->partial) {
194 printf("VRAM Write: %X to %X\n", start->value, context->address ^ 1); 195 //printf("VRAM Write: %X to %X\n", start->value, context->address ^ 1);
195 context->vdpmem[context->address ^ 1] = start->value; 196 context->vdpmem[context->address ^ 1] = start->value;
196 } else { 197 } else {
197 printf("VRAM Write: %X to %X\n", start->value >> 8, context->address); 198 //printf("VRAM Write: %X to %X\n", start->value >> 8, context->address);
198 context->vdpmem[context->address] = start->value >> 8; 199 context->vdpmem[context->address] = start->value >> 8;
199 start->partial = 1; 200 start->partial = 1;
200 //skip auto-increment and removal of entry from fifo 201 //skip auto-increment and removal of entry from fifo
201 return; 202 return;
202 } 203 }
203 break; 204 break;
204 case CRAM_WRITE: 205 case CRAM_WRITE:
205 printf("CRAM Write: %X to %X\n", start->value, context->address); 206 //printf("CRAM Write: %X to %X\n", start->value, context->address);
206 context->cram[(context->address/2) & (CRAM_SIZE-1)] = start->value; 207 context->cram[(context->address/2) & (CRAM_SIZE-1)] = start->value;
207 break; 208 break;
208 case VSRAM_WRITE: 209 case VSRAM_WRITE:
209 if (((context->address/2) & 63) < VSRAM_SIZE) { 210 if (((context->address/2) & 63) < VSRAM_SIZE) {
210 printf("VSRAM Write: %X to %X\n", start->value, context->address); 211 //printf("VSRAM Write: %X to %X\n", start->value, context->address);
211 context->vsram[(context->address/2) & 63] = start->value; 212 context->vsram[(context->address/2) & 63] = start->value;
212 } 213 }
213 break; 214 break;
214 } 215 }
215 context->address += context->regs[REG_AUTOINC]; 216 context->address += context->regs[REG_AUTOINC];
885 return context->cycles; 886 return context->cycles;
886 } 887 }
887 888
888 void vdp_control_port_write(vdp_context * context, uint16_t value) 889 void vdp_control_port_write(vdp_context * context, uint16_t value)
889 { 890 {
890 printf("control port write: %X\n", value); 891 //printf("control port write: %X\n", value);
891 if (context->flags & FLAG_PENDING) { 892 if (context->flags & FLAG_PENDING) {
892 context->address = (context->address & 0x3FFF) | (value << 14); 893 context->address = (context->address & 0x3FFF) | (value << 14);
893 context->cd = (context->cd & 0x3) | ((value >> 2) & 0x3C); 894 context->cd = (context->cd & 0x3) | ((value >> 2) & 0x3C);
894 context->flags &= ~FLAG_PENDING; 895 context->flags &= ~FLAG_PENDING;
895 } else { 896 } else {
896 if ((value & 0xC000) == 0x8000) { 897 if ((value & 0xC000) == 0x8000) {
897 //Register write 898 //Register write
898 uint8_t reg = (value >> 8) & 0x1F; 899 uint8_t reg = (value >> 8) & 0x1F;
899 if (reg < VDP_REGS) { 900 if (reg < VDP_REGS) {
900 printf("register %d set to %X\n", reg, value); 901 //printf("register %d set to %X\n", reg, value);
901 context->regs[reg] = value; 902 context->regs[reg] = value;
902 } 903 }
903 } else { 904 } else {
904 context->flags |= FLAG_PENDING; 905 context->flags |= FLAG_PENDING;
905 context->address = (context->address &0xC000) | (value & 0x3FFF); 906 context->address = (context->address &0xC000) | (value & 0x3FFF);
908 } 909 }
909 } 910 }
910 911
911 void vdp_data_port_write(vdp_context * context, uint16_t value) 912 void vdp_data_port_write(vdp_context * context, uint16_t value)
912 { 913 {
913 printf("data port write: %X\n", value); 914 //printf("data port write: %X\n", value);
914 context->flags &= ~FLAG_PENDING; 915 context->flags &= ~FLAG_PENDING;
915 if (context->fifo_cur == context->fifo_end) { 916 /*if (context->fifo_cur == context->fifo_end) {
916 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles); 917 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles);
917 } 918 }*/
918 while (context->fifo_cur == context->fifo_end) { 919 while (context->fifo_cur == context->fifo_end) {
919 vdp_run_context(context, context->cycles + ((context->latched_mode & BIT_H40) ? 16 : 20)); 920 vdp_run_context(context, context->cycles + ((context->latched_mode & BIT_H40) ? 16 : 20));
920 } 921 }
921 context->fifo_cur->cycle = context->cycles; 922 context->fifo_cur->cycle = context->cycles;
922 context->fifo_cur->value = value; 923 context->fifo_cur->value = value;