Mercurial > repos > blastem
comparison gentests.py @ 2444:ab577e2ed66a
Update some 68K test harness scripts to Python 3
author | Michael Pavone <pavone@retrodev.com> |
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date | Tue, 13 Feb 2024 21:18:31 -0800 |
parents | f6ee0df6bb48 |
children | bb6cc45518e6 |
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2443:461fffc226e0 | 2444:ab577e2ed66a |
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1 #!/usr/bin/env python | 1 #!/usr/bin/env python3 |
2 | 2 |
3 def split_fields(line): | 3 def split_fields(line): |
4 parts = [] | 4 parts = [] |
5 while line: | 5 while line: |
6 field,_,line = line.partition('\t') | 6 field,_,line = line.partition('\t') |
23 | 23 |
24 def write_rom_test(self, outfile): | 24 def write_rom_test(self, outfile): |
25 outfile.write('\tdc.l $0, start\n') | 25 outfile.write('\tdc.l $0, start\n') |
26 needdivzero = self.inst.name.startswith('div') | 26 needdivzero = self.inst.name.startswith('div') |
27 needchk = self.inst.name.startswith('chk') | 27 needchk = self.inst.name.startswith('chk') |
28 for i in xrange(0x8, 0x100, 0x4): | 28 for i in range(0x8, 0x100, 0x4): |
29 if needdivzero and i == 0x14: | 29 if needdivzero and i == 0x14: |
30 outfile.write('\tdc.l div_zero_handler\n') | 30 outfile.write('\tdc.l div_zero_handler\n') |
31 elif needchk and i == 0x18: | 31 elif needchk and i == 0x18: |
32 outfile.write('\tdc.l chk_handler\n') | 32 outfile.write('\tdc.l chk_handler\n') |
33 else: | 33 else: |
107 | 107 |
108 def valid_ram_address(address, size='b'): | 108 def valid_ram_address(address, size='b'): |
109 return address >= 0xE00000 and address <= 0xFFFFFFFC and (address & 0xE00000) == 0xE00000 and (size == 'b' or not address & 1) | 109 return address >= 0xE00000 and address <= 0xFFFFFFFC and (address & 0xE00000) == 0xE00000 and (size == 'b' or not address & 1) |
110 | 110 |
111 def random_ram_address(mina=0xE00000, maxa=0xFFFFFFFC): | 111 def random_ram_address(mina=0xE00000, maxa=0xFFFFFFFC): |
112 return randint(mina/2, maxa/2)*2 | 0xE00000 | 112 return randint(mina//2, maxa//2)*2 | 0xE00000 |
113 | 113 |
114 class Indexed(object): | 114 class Indexed(object): |
115 def __init__(self, base, index, index_size, disp): | 115 def __init__(self, base, index, index_size, disp): |
116 self.base = base | 116 self.base = base |
117 self.index = index | 117 self.index = index |
149 self.write_init(outfile, size, already) | 149 self.write_init(outfile, size, already) |
150 return | 150 return |
151 else: | 151 else: |
152 base = index = already[str(self.base)] | 152 base = index = already[str(self.base)] |
153 else: | 153 else: |
154 base = index = already[str(self.base)] = random_ram_address()/2 | 154 base = index = already[str(self.base)] = random_ram_address()//2 |
155 outfile.write('\tmove.l #' + str(base) + ', ' + str(self.base) + '\n') | 155 outfile.write('\tmove.l #' + str(base) + ', ' + str(self.base) + '\n') |
156 else: | 156 else: |
157 if str(self.base) in already: | 157 if str(self.base) in already: |
158 if not valid_ram_address(already[str(self.base)]): | 158 if not valid_ram_address(already[str(self.base)]): |
159 del already[str(self.base)] | 159 del already[str(self.base)] |
373 | 373 |
374 def all_disp(): | 374 def all_disp(): |
375 return [Displacement(base, randint(-32768, 32767)) for base in all_aregs] | 375 return [Displacement(base, randint(-32768, 32767)) for base in all_aregs] |
376 | 376 |
377 def rand_pc_disp(): | 377 def rand_pc_disp(): |
378 return [Displacement(Register('pc', 0), randint(-32768, -1024)) for x in xrange(0, 8)] | 378 return [Displacement(Register('pc', 0), randint(-32768, -1024)) for x in range(0, 8)] |
379 | 379 |
380 def all_pc_indexed(): | 380 def all_pc_indexed(): |
381 return [Indexed(Register('pc', 0), index, index_size, randint(-128, 127)) for index in all_dregs + all_aregs for index_size in ('w','l')] | 381 return [Indexed(Register('pc', 0), index, index_size, randint(-128, 127)) for index in all_dregs + all_aregs for index_size in ('w','l')] |
382 | 382 |
383 def rand_abs_short(): | 383 def rand_abs_short(): |
384 return [Absolute(random_ram_address(0xFFFF8000), 'w') for x in xrange(0, 8)] | 384 return [Absolute(random_ram_address(0xFFFF8000), 'w') for x in range(0, 8)] |
385 | 385 |
386 def rand_abs_long(): | 386 def rand_abs_long(): |
387 return [Absolute(random_ram_address(), 'l') for x in xrange(0, 8)] | 387 return [Absolute(random_ram_address(), 'l') for x in range(0, 8)] |
388 | 388 |
389 def get_size_range(size): | 389 def get_size_range(size): |
390 if size == 'b': | 390 if size == 'b': |
391 return (-128, 127) | 391 return (-128, 127) |
392 elif size == 'w': | 392 elif size == 'w': |
395 return (-2147483648, 2147483647) | 395 return (-2147483648, 2147483647) |
396 | 396 |
397 def rand_immediate(size): | 397 def rand_immediate(size): |
398 minv,maxv = get_size_range(size) | 398 minv,maxv = get_size_range(size) |
399 | 399 |
400 return [Immediate(randint(minv, maxv)) for x in xrange(0,8)] | 400 return [Immediate(randint(minv, maxv)) for x in range(0,8)] |
401 | 401 |
402 def get_variations(mode, size): | 402 def get_variations(mode, size): |
403 mapping = { | 403 mapping = { |
404 'd':all_dregs, | 404 'd':all_dregs, |
405 'a':all_aregs, | 405 'a':all_aregs, |
427 if end-start > 16: | 427 if end-start > 16: |
428 return [Immediate(randint(start, end)) for x in range(0,8)] | 428 return [Immediate(randint(start, end)) for x in range(0,8)] |
429 else: | 429 else: |
430 return [Immediate(num) for num in range(start, end+1)] | 430 return [Immediate(num) for num in range(start, end+1)] |
431 else: | 431 else: |
432 print "Don't know what to do with source type", mode | 432 print("Don't know what to do with source type", mode) |
433 return None | 433 return None |
434 | 434 |
435 class Inst2Op(object): | 435 class Inst2Op(object): |
436 def __init__(self, name, size, src, dst): | 436 def __init__(self, name, size, src, dst): |
437 self.name = name | 437 self.name = name |