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comparison z80_to_x86.c @ 399:acaae7c3d34c

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Fix adc and sbc
author Mike Pavone <pavone@retrodev.com>
date Fri, 14 Jun 2013 23:27:01 -0700
parents c20607e5b272
children f54af24aad1d
comparison
equal deleted inserted replaced
398:c26e48a93fa3 399:acaae7c3d34c
616 cycles += 4; 616 cycles += 4;
617 } 617 }
618 dst = zcycles(dst, cycles); 618 dst = zcycles(dst, cycles);
619 dst = translate_z80_reg(inst, &dst_op, dst, opts); 619 dst = translate_z80_reg(inst, &dst_op, dst, opts);
620 dst = translate_z80_ea(inst, &src_op, dst, opts, READ, DONT_MODIFY); 620 dst = translate_z80_ea(inst, &src_op, dst, opts, READ, DONT_MODIFY);
621 dst = bt_irdisp8(dst, 0, CONTEXT, zf_off(ZF_C), SZ_B);
621 if (src_op.mode == MODE_REG_DIRECT) { 622 if (src_op.mode == MODE_REG_DIRECT) {
622 dst = adc_rr(dst, src_op.base, dst_op.base, z80_size(inst)); 623 dst = adc_rr(dst, src_op.base, dst_op.base, z80_size(inst));
623 } else { 624 } else {
624 dst = adc_ir(dst, src_op.disp, dst_op.base, z80_size(inst)); 625 dst = adc_ir(dst, src_op.disp, dst_op.base, z80_size(inst));
625 } 626 }
666 cycles += 4; 667 cycles += 4;
667 } 668 }
668 dst = zcycles(dst, cycles); 669 dst = zcycles(dst, cycles);
669 dst = translate_z80_reg(inst, &dst_op, dst, opts); 670 dst = translate_z80_reg(inst, &dst_op, dst, opts);
670 dst = translate_z80_ea(inst, &src_op, dst, opts, READ, DONT_MODIFY); 671 dst = translate_z80_ea(inst, &src_op, dst, opts, READ, DONT_MODIFY);
672 dst = bt_irdisp8(dst, 0, CONTEXT, zf_off(ZF_C), SZ_B);
671 if (src_op.mode == MODE_REG_DIRECT) { 673 if (src_op.mode == MODE_REG_DIRECT) {
672 dst = sbb_rr(dst, src_op.base, dst_op.base, z80_size(inst)); 674 dst = sbb_rr(dst, src_op.base, dst_op.base, z80_size(inst));
673 } else { 675 } else {
674 dst = sbb_ir(dst, src_op.disp, dst_op.base, z80_size(inst)); 676 dst = sbb_ir(dst, src_op.disp, dst_op.base, z80_size(inst));
675 } 677 }