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comparison segacd.c @ 2128:b0dcf5c9f353

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Fix some issues with PCM dma/CPU write conflicts
author Michael Pavone <pavone@retrodev.com>
date Sun, 13 Mar 2022 11:36:06 -0700
parents 1bf30397dd45
children 4c9e447aa25b
comparison
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2127:1bf30397dd45 2128:b0dcf5c9f353
363 segacd_context *cd = m68k->system; 363 segacd_context *cd = m68k->system;
364 if (address & 1) { 364 if (address & 1) {
365 //need to run CD drive because there may be a PCM DMA underway 365 //need to run CD drive because there may be a PCM DMA underway
366 cdd_run(cd, m68k->current_cycle); 366 cdd_run(cd, m68k->current_cycle);
367 rf5c164_run(&cd->pcm, m68k->current_cycle); 367 rf5c164_run(&cd->pcm, m68k->current_cycle);
368 while ((cd->pcm.flags & 0x81) == 1) {
369 //not sounding, but pending write
370 //DMA write conflict presumably adds wait states
371 m68k->current_cycle += 4;
372 rf5c164_run(&cd->pcm, m68k->current_cycle);
373 }
368 rf5c164_write(&cd->pcm, address >> 1, value); 374 rf5c164_write(&cd->pcm, address >> 1, value);
369 } 375 }
370 return vcontext; 376 return vcontext;
371 } 377 }
372 378
887 cd->gate_array[GA_CDC_CTRL] |= BIT_DSR; 893 cd->gate_array[GA_CDC_CTRL] |= BIT_DSR;
888 break; 894 break;
889 case DST_PCM_RAM: 895 case DST_PCM_RAM:
890 dma_addr &= (1 << 13) - 1; 896 dma_addr &= (1 << 13) - 1;
891 rf5c164_run(&cd->pcm, cd->cdc.cycle); 897 rf5c164_run(&cd->pcm, cd->cdc.cycle);
898 while ((cd->pcm.flags & 0x81) == 1) {
899 //not sounding, but pending write
900 //DMA write conflict with CPU
901 rf5c164_run(&cd->pcm, cd->pcm.cycle + 4);
902 }
892 rf5c164_write(&cd->pcm, 0x1000 | (dma_addr >> 1), value); 903 rf5c164_write(&cd->pcm, 0x1000 | (dma_addr >> 1), value);
893 dma_addr += 2; 904 dma_addr += 2;
894 cd->cdc_dst_low = dma_addr & 7; 905 cd->cdc_dst_low = dma_addr & 7;
895 cd->gate_array[GA_CDC_DMA_ADDR] = dma_addr >> 3; 906 cd->gate_array[GA_CDC_DMA_ADDR] = dma_addr >> 3;
896 break; 907 break;