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comparison m68k_core.c @ 1102:c15896605bf2

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Clean up symbol visiblity and delete a ltitle bit of dead code
author Michael Pavone <pavone@retrodev.com>
date Mon, 28 Nov 2016 22:45:46 -0800
parents 2ec5e6eaf81d
children 8f14767661fa
comparison
equal deleted inserted replaced
1101:e2d345e351b5 1102:c15896605bf2
98 } 98 }
99 m68k_write_size(opts, inst->extra.size, 1); 99 m68k_write_size(opts, inst->extra.size, 1);
100 } 100 }
101 } 101 }
102 102
103 void translate_m68k_lea_pea(m68k_options * opts, m68kinst * inst) 103 static void translate_m68k_lea_pea(m68k_options * opts, m68kinst * inst)
104 { 104 {
105 code_info *code = &opts->gen.code; 105 code_info *code = &opts->gen.code;
106 int8_t dst_reg = inst->op == M68K_PEA ? opts->gen.scratch1 : native_reg(&(inst->dst), opts); 106 int8_t dst_reg = inst->op == M68K_PEA ? opts->gen.scratch1 : native_reg(&(inst->dst), opts);
107 switch(inst->src.addr_mode) 107 switch(inst->src.addr_mode)
108 { 108 {
173 areg_to_native(opts, 7, opts->gen.scratch2); 173 areg_to_native(opts, 7, opts->gen.scratch2);
174 call(code, opts->write_32_lowfirst); 174 call(code, opts->write_32_lowfirst);
175 } 175 }
176 } 176 }
177 177
178 void push_const(m68k_options *opts, int32_t value) 178 static void push_const(m68k_options *opts, int32_t value)
179 { 179 {
180 ldi_native(opts, value, opts->gen.scratch1); 180 ldi_native(opts, value, opts->gen.scratch1);
181 subi_areg(opts, 4, 7); 181 subi_areg(opts, 4, 7);
182 areg_to_native(opts, 7, opts->gen.scratch2); 182 areg_to_native(opts, 7, opts->gen.scratch2);
183 call(&opts->gen.code, opts->write_32_highfirst); 183 call(&opts->gen.code, opts->write_32_highfirst);
195 jmp(code, dest_addr); 195 jmp(code, dest_addr);
196 //this used to call opts->native_addr for destinations in RAM, but that shouldn't be needed 196 //this used to call opts->native_addr for destinations in RAM, but that shouldn't be needed
197 //since instruction retranslation patches the original native instruction location 197 //since instruction retranslation patches the original native instruction location
198 } 198 }
199 199
200 void translate_m68k_bsr(m68k_options * opts, m68kinst * inst) 200 static void translate_m68k_bsr(m68k_options * opts, m68kinst * inst)
201 { 201 {
202 code_info *code = &opts->gen.code; 202 code_info *code = &opts->gen.code;
203 int32_t disp = inst->src.params.immed; 203 int32_t disp = inst->src.params.immed;
204 uint32_t after = inst->address + (inst->variant == VAR_BYTE ? 2 : 4); 204 uint32_t after = inst->address + (inst->variant == VAR_BYTE ? 2 : 4);
205 //TODO: Add cycles in the right place relative to pushing the return address on the stack 205 //TODO: Add cycles in the right place relative to pushing the return address on the stack
206 cycles(&opts->gen, 10); 206 cycles(&opts->gen, 10);
207 push_const(opts, after); 207 push_const(opts, after);
208 jump_m68k_abs(opts, inst->address + 2 + disp); 208 jump_m68k_abs(opts, inst->address + 2 + disp);
209 } 209 }
210 210
211 void translate_m68k_jmp_jsr(m68k_options * opts, m68kinst * inst) 211 static void translate_m68k_jmp_jsr(m68k_options * opts, m68kinst * inst)
212 { 212 {
213 uint8_t is_jsr = inst->op == M68K_JSR; 213 uint8_t is_jsr = inst->op == M68K_JSR;
214 code_info *code = &opts->gen.code; 214 code_info *code = &opts->gen.code;
215 code_ptr dest_addr; 215 code_ptr dest_addr;
216 uint8_t sec_reg; 216 uint8_t sec_reg;
276 m68k_disasm(inst, disasm_buf); 276 m68k_disasm(inst, disasm_buf);
277 fatal_error("%s\naddress mode %d not yet supported (%s)\n", disasm_buf, inst->src.addr_mode, is_jsr ? "jsr" : "jmp"); 277 fatal_error("%s\naddress mode %d not yet supported (%s)\n", disasm_buf, inst->src.addr_mode, is_jsr ? "jsr" : "jmp");
278 } 278 }
279 } 279 }
280 280
281 void translate_m68k_unlk(m68k_options * opts, m68kinst * inst) 281 static void translate_m68k_unlk(m68k_options * opts, m68kinst * inst)
282 { 282 {
283 cycles(&opts->gen, BUS); 283 cycles(&opts->gen, BUS);
284 areg_to_native(opts, inst->dst.params.regs.pri, opts->aregs[7]); 284 areg_to_native(opts, inst->dst.params.regs.pri, opts->aregs[7]);
285 areg_to_native(opts, 7, opts->gen.scratch1); 285 areg_to_native(opts, 7, opts->gen.scratch1);
286 call(&opts->gen.code, opts->read_32); 286 call(&opts->gen.code, opts->read_32);
287 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri); 287 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri);
288 addi_areg(opts, 4, 7); 288 addi_areg(opts, 4, 7);
289 } 289 }
290 290
291 void translate_m68k_link(m68k_options * opts, m68kinst * inst) 291 static void translate_m68k_link(m68k_options * opts, m68kinst * inst)
292 { 292 {
293 //compensate for displacement word 293 //compensate for displacement word
294 cycles(&opts->gen, BUS); 294 cycles(&opts->gen, BUS);
295 subi_areg(opts, 4, 7); 295 subi_areg(opts, 4, 7);
296 areg_to_native(opts, 7, opts->gen.scratch2); 296 areg_to_native(opts, 7, opts->gen.scratch2);
300 addi_areg(opts, inst->dst.params.immed, 7); 300 addi_areg(opts, inst->dst.params.immed, 7);
301 //prefetch 301 //prefetch
302 cycles(&opts->gen, BUS); 302 cycles(&opts->gen, BUS);
303 } 303 }
304 304
305 void translate_m68k_rts(m68k_options * opts, m68kinst * inst) 305 static void translate_m68k_rts(m68k_options * opts, m68kinst * inst)
306 { 306 {
307 code_info *code = &opts->gen.code; 307 code_info *code = &opts->gen.code;
308 //TODO: Add cycles 308 //TODO: Add cycles
309 areg_to_native(opts, 7, opts->gen.scratch1); 309 areg_to_native(opts, 7, opts->gen.scratch1);
310 addi_areg(opts, 4, 7); 310 addi_areg(opts, 4, 7);
311 call(code, opts->read_32); 311 call(code, opts->read_32);
312 call(code, opts->native_addr); 312 call(code, opts->native_addr);
313 jmp_r(code, opts->gen.scratch1); 313 jmp_r(code, opts->gen.scratch1);
314 } 314 }
315 315
316 void translate_m68k_rtr(m68k_options *opts, m68kinst * inst) 316 static void translate_m68k_rtr(m68k_options *opts, m68kinst * inst)
317 { 317 {
318 code_info *code = &opts->gen.code; 318 code_info *code = &opts->gen.code;
319 //Read saved CCR 319 //Read saved CCR
320 areg_to_native(opts, 7, opts->gen.scratch1); 320 areg_to_native(opts, 7, opts->gen.scratch1);
321 call(code, opts->read_16); 321 call(code, opts->read_16);
328 //Get native address and jump to it 328 //Get native address and jump to it
329 call(code, opts->native_addr); 329 call(code, opts->native_addr);
330 jmp_r(code, opts->gen.scratch1); 330 jmp_r(code, opts->gen.scratch1);
331 } 331 }
332 332
333 void translate_m68k_trap(m68k_options *opts, m68kinst *inst) 333 static void translate_m68k_trap(m68k_options *opts, m68kinst *inst)
334 { 334 {
335 code_info *code = &opts->gen.code; 335 code_info *code = &opts->gen.code;
336 uint32_t vector, pc = inst->address; 336 uint32_t vector, pc = inst->address;
337 switch (inst->op) 337 switch (inst->op)
338 { 338 {
350 ldi_native(opts, vector, opts->gen.scratch2); 350 ldi_native(opts, vector, opts->gen.scratch2);
351 ldi_native(opts, pc, opts->gen.scratch1); 351 ldi_native(opts, pc, opts->gen.scratch1);
352 jmp(code, opts->trap); 352 jmp(code, opts->trap);
353 } 353 }
354 354
355 void translate_m68k_illegal(m68k_options *opts, m68kinst *inst) 355 static void translate_m68k_illegal(m68k_options *opts, m68kinst *inst)
356 { 356 {
357 code_info *code = &opts->gen.code; 357 code_info *code = &opts->gen.code;
358 cycles(&opts->gen, BUS); 358 cycles(&opts->gen, BUS);
359 ldi_native(opts, VECTOR_ILLEGAL_INST, opts->gen.scratch2); 359 ldi_native(opts, VECTOR_ILLEGAL_INST, opts->gen.scratch2);
360 ldi_native(opts, inst->address, opts->gen.scratch1); 360 ldi_native(opts, inst->address, opts->gen.scratch1);
361 jmp(code, opts->trap); 361 jmp(code, opts->trap);
362 } 362 }
363 363
364 void translate_m68k_move_usp(m68k_options *opts, m68kinst *inst) 364 static void translate_m68k_move_usp(m68k_options *opts, m68kinst *inst)
365 { 365 {
366 m68k_trap_if_not_supervisor(opts, inst); 366 m68k_trap_if_not_supervisor(opts, inst);
367 cycles(&opts->gen, BUS); 367 cycles(&opts->gen, BUS);
368 int8_t reg; 368 int8_t reg;
369 if (inst->src.addr_mode == MODE_UNUSED) { 369 if (inst->src.addr_mode == MODE_UNUSED) {
383 } 383 }
384 native_to_areg(opts, reg, 8); 384 native_to_areg(opts, reg, 8);
385 } 385 }
386 } 386 }
387 387
388 void translate_m68k_movem(m68k_options * opts, m68kinst * inst) 388 static void translate_m68k_movem(m68k_options * opts, m68kinst * inst)
389 { 389 {
390 code_info *code = &opts->gen.code; 390 code_info *code = &opts->gen.code;
391 int8_t bit,reg,sec_reg; 391 int8_t bit,reg,sec_reg;
392 uint8_t early_cycles; 392 uint8_t early_cycles;
393 if(inst->src.addr_mode == MODE_REG) { 393 if(inst->src.addr_mode == MODE_REG) {
523 } 523 }
524 //prefetch 524 //prefetch
525 cycles(&opts->gen, 4); 525 cycles(&opts->gen, 4);
526 } 526 }
527 527
528 void translate_m68k_nop(m68k_options *opts, m68kinst *inst) 528 static void translate_m68k_nop(m68k_options *opts, m68kinst *inst)
529 { 529 {
530 cycles(&opts->gen, BUS); 530 cycles(&opts->gen, BUS);
531 } 531 }
532 532
533 void swap_ssp_usp(m68k_options * opts) 533 void swap_ssp_usp(m68k_options * opts)
535 areg_to_native(opts, 7, opts->gen.scratch2); 535 areg_to_native(opts, 7, opts->gen.scratch2);
536 areg_to_native(opts, 8, opts->aregs[7]); 536 areg_to_native(opts, 8, opts->aregs[7]);
537 native_to_areg(opts, opts->gen.scratch2, 8); 537 native_to_areg(opts, opts->gen.scratch2, 8);
538 } 538 }
539 539
540 void translate_m68k_rte(m68k_options *opts, m68kinst *inst) 540 static void translate_m68k_rte(m68k_options *opts, m68kinst *inst)
541 { 541 {
542 m68k_trap_if_not_supervisor(opts, inst); 542 m68k_trap_if_not_supervisor(opts, inst);
543 543
544 code_info *code = &opts->gen.code; 544 code_info *code = &opts->gen.code;
545 //Read saved SR 545 //Read saved SR
612 offset = address % NATIVE_CHUNK_SIZE; 612 offset = address % NATIVE_CHUNK_SIZE;
613 } 613 }
614 return address; 614 return address;
615 } 615 }
616 616
617 void map_native_address(m68k_context * context, uint32_t address, code_ptr native_addr, uint8_t size, uint8_t native_size) 617 static void map_native_address(m68k_context * context, uint32_t address, code_ptr native_addr, uint8_t size, uint8_t native_size)
618 { 618 {
619 native_map_slot * native_code_map = context->native_code_map; 619 native_map_slot * native_code_map = context->native_code_map;
620 m68k_options * opts = context->options; 620 m68k_options * opts = context->options;
621 address &= opts->gen.address_mask; 621 address &= opts->gen.address_mask;
622 uint32_t meta_off = 0; 622 uint32_t meta_off = 0;
672 native_code_map[chunk].offsets[offset] = EXTENSION_WORD; 672 native_code_map[chunk].offsets[offset] = EXTENSION_WORD;
673 } 673 }
674 } 674 }
675 } 675 }
676 676
677 uint8_t get_native_inst_size(m68k_options * opts, uint32_t address) 677 static uint8_t get_native_inst_size(m68k_options * opts, uint32_t address)
678 { 678 {
679 address &= opts->gen.address_mask; 679 address &= opts->gen.address_mask;
680 uint32_t meta_off = 0; 680 uint32_t meta_off = 0;
681 for (int i = 0; i < opts->gen.memmap_chunks; i++) { 681 for (int i = 0; i < opts->gen.memmap_chunks; i++) {
682 if (address >= opts->gen.memmap[i].start && address < opts->gen.memmap[i].end) { 682 if (address >= opts->gen.memmap[i].start && address < opts->gen.memmap[i].end) {
699 return inst->op == M68K_RTS || inst->op == M68K_RTE || inst->op == M68K_RTR || inst->op == M68K_JMP 699 return inst->op == M68K_RTS || inst->op == M68K_RTE || inst->op == M68K_RTR || inst->op == M68K_JMP
700 || inst->op == M68K_TRAP || inst->op == M68K_ILLEGAL || inst->op == M68K_INVALID || inst->op == M68K_RESET 700 || inst->op == M68K_TRAP || inst->op == M68K_ILLEGAL || inst->op == M68K_INVALID || inst->op == M68K_RESET
701 || (inst->op == M68K_BCC && inst->extra.cond == COND_TRUE); 701 || (inst->op == M68K_BCC && inst->extra.cond == COND_TRUE);
702 } 702 }
703 703
704 void m68k_handle_deferred(m68k_context * context) 704 static void m68k_handle_deferred(m68k_context * context)
705 { 705 {
706 m68k_options * opts = context->options; 706 m68k_options * opts = context->options;
707 process_deferred(&opts->gen.deferred, context, (native_addr_func)get_native_from_context); 707 process_deferred(&opts->gen.deferred, context, (native_addr_func)get_native_from_context);
708 if (opts->gen.deferred) { 708 if (opts->gen.deferred) {
709 translate_m68k_stream(opts->gen.deferred->address, context); 709 translate_m68k_stream(opts->gen.deferred->address, context);
743 #define RAW_IMPL(inst, fun) [inst] = { .impl = { .raw = fun }, .itype = RAW_FUNC } 743 #define RAW_IMPL(inst, fun) [inst] = { .impl = { .raw = fun }, .itype = RAW_FUNC }
744 #define OP_IMPL(inst, fun) [inst] = { .impl = { .op = fun }, .itype = OP_FUNC } 744 #define OP_IMPL(inst, fun) [inst] = { .impl = { .op = fun }, .itype = OP_FUNC }
745 #define UNARY_IMPL(inst, mask) [inst] = { .impl = { .flag_mask = mask }, .itype = UNARY_ARITH } 745 #define UNARY_IMPL(inst, mask) [inst] = { .impl = { .flag_mask = mask }, .itype = UNARY_ARITH }
746 #define BINARY_IMPL(inst, mask) [inst] = { .impl = { .flag_mask = mask}, .itype = BINARY_ARITH } 746 #define BINARY_IMPL(inst, mask) [inst] = { .impl = { .flag_mask = mask}, .itype = BINARY_ARITH }
747 747
748 impl_info m68k_impls[] = { 748 static impl_info m68k_impls[] = {
749 //math 749 //math
750 BINARY_IMPL(M68K_ADD, X|N|Z|V|C), 750 BINARY_IMPL(M68K_ADD, X|N|Z|V|C),
751 BINARY_IMPL(M68K_SUB, X|N|Z|V|C), 751 BINARY_IMPL(M68K_SUB, X|N|Z|V|C),
752 //z flag is special cased for ADDX/SUBX 752 //z flag is special cased for ADDX/SUBX
753 BINARY_IMPL(M68K_ADDX, X|N|V|C), 753 BINARY_IMPL(M68K_ADDX, X|N|V|C),
834 RAW_IMPL(M68K_NOP, translate_m68k_nop), 834 RAW_IMPL(M68K_NOP, translate_m68k_nop),
835 RAW_IMPL(M68K_RESET, translate_m68k_reset), 835 RAW_IMPL(M68K_RESET, translate_m68k_reset),
836 RAW_IMPL(M68K_TAS, translate_m68k_tas), 836 RAW_IMPL(M68K_TAS, translate_m68k_tas),
837 }; 837 };
838 838
839 void translate_m68k(m68k_options * opts, m68kinst * inst) 839 static void translate_m68k(m68k_options * opts, m68kinst * inst)
840 { 840 {
841 if (inst->address & 1) { 841 if (inst->address & 1) {
842 translate_m68k_odd(opts, inst); 842 translate_m68k_odd(opts, inst);
843 return; 843 return;
844 } 844 }