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comparison m68k_core.c @ 1323:c9dc2603b087

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Fixed timing for RTS and RTE
author Michael Pavone <pavone@retrodev.com>
date Thu, 20 Apr 2017 22:28:58 -0700
parents d5a47597b61f
children 85a90964b557
comparison
equal deleted inserted replaced
1322:b1423d432c0e 1323:c9dc2603b087
303 } 303 }
304 304
305 static void translate_m68k_rts(m68k_options * opts, m68kinst * inst) 305 static void translate_m68k_rts(m68k_options * opts, m68kinst * inst)
306 { 306 {
307 code_info *code = &opts->gen.code; 307 code_info *code = &opts->gen.code;
308 //TODO: Add cycles
309 areg_to_native(opts, 7, opts->gen.scratch1); 308 areg_to_native(opts, 7, opts->gen.scratch1);
310 addi_areg(opts, 4, 7); 309 addi_areg(opts, 4, 7);
311 call(code, opts->read_32); 310 call(code, opts->read_32);
311 cycles(&opts->gen, 2*BUS);
312 call(code, opts->native_addr); 312 call(code, opts->native_addr);
313 jmp_r(code, opts->gen.scratch1); 313 jmp_r(code, opts->gen.scratch1);
314 } 314 }
315 315
316 static void translate_m68k_rtr(m68k_options *opts, m68kinst * inst) 316 static void translate_m68k_rtr(m68k_options *opts, m68kinst * inst)
624 //Read saved PC 624 //Read saved PC
625 areg_to_native(opts, 7, opts->gen.scratch1); 625 areg_to_native(opts, 7, opts->gen.scratch1);
626 call(code, opts->read_32); 626 call(code, opts->read_32);
627 addi_areg(opts, 4, 7); 627 addi_areg(opts, 4, 7);
628 check_user_mode_swap_ssp_usp(opts); 628 check_user_mode_swap_ssp_usp(opts);
629 cycles(&opts->gen, 2*BUS);
629 //Get native address, sync components, recalculate integer points and jump to returned address 630 //Get native address, sync components, recalculate integer points and jump to returned address
630 call(code, opts->native_addr_and_sync); 631 call(code, opts->native_addr_and_sync);
631 jmp_r(code, opts->gen.scratch1); 632 jmp_r(code, opts->gen.scratch1);
632 } 633 }
633 634