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comparison cpu_dsl.py @ 2621:ce9386a7b21e

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Fix V flag for asl in new CPU core
author Michael Pavone <pavone@retrodev.com>
date Sat, 22 Feb 2025 01:31:51 -0800
parents 1579b840a1af
children 47e197d40ffe
comparison
equal deleted inserted replaced
2620:b58ca7af1e60 2621:ce9386a7b21e
611 elif calc == 'half': 611 elif calc == 'half':
612 resultBit = prog.getLastSize() - 4 612 resultBit = prog.getLastSize() - 4
613 myRes = '({a} ^ {b} ^ {res})'.format(a = prog.lastA, b = prog.lastB, res = lastDst) 613 myRes = '({a} ^ {b} ^ {res})'.format(a = prog.lastA, b = prog.lastB, res = lastDst)
614 elif calc == 'overflow': 614 elif calc == 'overflow':
615 resultBit = prog.getLastSize() - 1 615 resultBit = prog.getLastSize() - 1
616 myRes = '((({a} ^ {b})) & ({a} ^ {res}))'.format(a = prog.lastA, b = prog.lastBFlow, res = lastDst) 616 if prog.lastOp.op == 'lsl':
617 myRes = f'({prog.lastA} ^ {lastDst})'
618 else:
619 myRes = '((({a} ^ {b})) & ({a} ^ {res}))'.format(a = prog.lastA, b = prog.lastBFlow, res = lastDst)
617 else: 620 else:
618 #Note: offsetting this by the operation size - 8 makes sense for the Z80 621 #Note: offsetting this by the operation size - 8 makes sense for the Z80
619 #but might not for other CPUs with this kind of fixed bit flag behavior 622 #but might not for other CPUs with this kind of fixed bit flag behavior
620 resultBit = int(resultBit) + prog.getLastSize() - 8 623 resultBit = int(resultBit) + prog.getLastSize() - 8
621 if type(storage) is tuple: 624 if type(storage) is tuple:
1724 for op in self.body: 1727 for op in self.body:
1725 op.processDispatch(prog) 1728 op.processDispatch(prog)
1726 1729
1727 def generate(self, prog, parent, fieldVals, output, otype, flagUpdates): 1730 def generate(self, prog, parent, fieldVals, output, otype, flagUpdates):
1728 self.regValues = parent.regValues 1731 self.regValues = parent.regValues
1732 for op in self.body:
1733 if op.op in _opMap:
1734 opDef = _opMap[op.op]
1735 if len(opDef.outOp):
1736 for index in opDef.outOp:
1737 dst = op.params[index]
1738 while dst in prog.meta:
1739 dst = prog.meta[dst]
1740 if dst in self.regValues:
1741 #value changes in loop body
1742 #so we need to prevent constant folding
1743 maybeLocal = self.resolveLocal(dst)
1744 if maybeLocal:
1745 #for locals, we also need to persist
1746 #the current constant fold value to the actual variable
1747 output.append(f'\n\t{maybeLocal} = {self.regValues[dst]};')
1748 del self.regValues[dst]
1749 else:
1750 #TODO: handle block types here
1751 pass
1729 if self.count: 1752 if self.count:
1730 count = prog.resolveParam(self.count, self, fieldVals) 1753 count = prog.resolveParam(self.count, self, fieldVals)
1731 output.append('\n\tfor (uint32_t loop_counter__ = 0; loop_counter__ < {count}; loop_counter__++) {') 1754 output.append(f'\n\tfor (uint32_t loop_counter__ = 0; loop_counter__ < {count}; loop_counter__++) {{')
1732 else: 1755 else:
1733 output.append('\n\tfor (;;) {') 1756 output.append('\n\tfor (;;) {')
1757
1734 self.processOps(prog, fieldVals, output, otype, self.body) 1758 self.processOps(prog, fieldVals, output, otype, self.body)
1735 output.append('\n\t}') 1759 output.append('\n\t}')
1736 1760
1737 def __str__(self): 1761 def __str__(self):
1738 lines = ['\n\tloop'] 1762 lines = ['\n\tloop']