comparison vdp.c @ 2385:ce9f5a42c481

Ensure VDP double_res flag is updated when loading a save state
author Michael Pavone <pavone@retrodev.com>
date Tue, 21 Nov 2023 21:01:16 -0800
parents d3479965e631
children efd2242c2c23
comparison
equal deleted inserted replaced
2384:03e6ac327ba0 2385:ce9f5a42c481
142 } 142 }
143 } 143 }
144 } 144 }
145 context->border_top = calc_crop(top_crop, border_top); 145 context->border_top = calc_crop(top_crop, border_top);
146 context->top_offset = border_top - context->border_top; 146 context->top_offset = border_top - context->border_top;
147 context->double_res = (context->regs[REG_MODE_4] & (BIT_INTERLACE | BIT_DOUBLE_RES)) == (BIT_INTERLACE | BIT_DOUBLE_RES);
148 if (!context->double_res) {
149 context->flags2 &= ~FLAG2_EVEN_FIELD;
150 }
147 } 151 }
148 152
149 static uint8_t static_table_init_done; 153 static uint8_t static_table_init_done;
150 154
151 vdp_context *init_vdp_context(uint8_t region_pal, uint8_t has_max_vsram, uint8_t type) 155 vdp_context *init_vdp_context(uint8_t region_pal, uint8_t has_max_vsram, uint8_t type)
4644 printf("Mode changed from H%d to H%d @ %d, frame: %d\n", context->regs[reg] & BIT_H40 ? 40 : 32, value & BIT_H40 ? 40 : 32, context->cycles, context->frame); 4648 printf("Mode changed from H%d to H%d @ %d, frame: %d\n", context->regs[reg] & BIT_H40 ? 40 : 32, value & BIT_H40 ? 40 : 32, context->cycles, context->frame);
4645 }*/ 4649 }*/
4646 uint8_t buffer[2] = {reg, value}; 4650 uint8_t buffer[2] = {reg, value};
4647 event_log(EVENT_VDP_REG, context->cycles, sizeof(buffer), buffer); 4651 event_log(EVENT_VDP_REG, context->cycles, sizeof(buffer), buffer);
4648 context->regs[reg] = value; 4652 context->regs[reg] = value;
4649 if (reg == REG_MODE_4) {
4650 context->double_res = (value & (BIT_INTERLACE | BIT_DOUBLE_RES)) == (BIT_INTERLACE | BIT_DOUBLE_RES);
4651 if (!context->double_res) {
4652 context->flags2 &= ~FLAG2_EVEN_FIELD;
4653 }
4654 }
4655 if (reg == REG_MODE_1 || reg == REG_MODE_2 || reg == REG_MODE_4) { 4653 if (reg == REG_MODE_1 || reg == REG_MODE_2 || reg == REG_MODE_4) {
4656 update_video_params(context); 4654 update_video_params(context);
4657 } 4655 }
4658 } else if (reg == REG_KMOD_CTRL) { 4656 } else if (reg == REG_KMOD_CTRL) {
4659 if (!(value & 0xFF)) { 4657 if (!(value & 0xFF)) {