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comparison trans.c @ 2448:d1eec03dca09

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Fix some issues in new 68K core and add implementations of negx and clr instructions
author Michael Pavone <pavone@retrodev.com>
date Thu, 15 Feb 2024 21:49:17 -0800
parents 339eff5dc350
children
comparison
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2447:414eb8c34198 2448:d1eec03dca09
36 exit(0); 36 exit(0);
37 } 37 }
38 if (context->status & M68K_STATUS_TRACE || context->trace_pending) { 38 if (context->status & M68K_STATUS_TRACE || context->trace_pending) {
39 context->target_cycle = context->current_cycle; 39 context->target_cycle = context->current_cycle;
40 } 40 }
41 #endif
41 return context; 42 return context;
42 #endif
43 } 43 }
44 44
45 m68k_context *reset_handler(m68k_context *context) 45 m68k_context *reset_handler(m68k_context *context)
46 { 46 {
47 m68k_print_regs(context); 47 m68k_print_regs(context);
90 init_m68k_opts(&opts, memmap, 2, 1, sync_components, int_ack); 90 init_m68k_opts(&opts, memmap, 2, 1, sync_components, int_ack);
91 m68k_context * context = init_68k_context(&opts, reset_handler); 91 m68k_context * context = init_68k_context(&opts, reset_handler);
92 context->mem_pointers[0] = memmap[0].buffer; 92 context->mem_pointers[0] = memmap[0].buffer;
93 context->mem_pointers[1] = memmap[1].buffer; 93 context->mem_pointers[1] = memmap[1].buffer;
94 #ifdef NEW_CORE 94 #ifdef NEW_CORE
95 context->cycles = 40; 95 context->cycles = 20;
96 #else 96 #else
97 context->current_cycle = 40; 97 context->current_cycle = 40;
98 context->target_cycle = context->sync_cycle = 8000; 98 context->target_cycle = context->sync_cycle = 8000;
99 #endif 99 #endif
100 m68k_reset(context); 100 m68k_reset(context);