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comparison genesis.c @ 2675:dbff641a33df

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Implement Z80/PSG clock speed test register bit
author Michael Pavone <pavone@retrodev.com>
date Fri, 14 Mar 2025 01:18:11 -0700
parents 2c8f541af3c5
children
comparison
equal deleted inserted replaced
2674:07cc0f7109f0 2675:dbff641a33df
252 if (gen->expansion) { 252 if (gen->expansion) {
253 segacd_context *cd = gen->expansion; 253 segacd_context *cd = gen->expansion;
254 segacd_register_section_handlers(cd, buf); 254 segacd_register_section_handlers(cd, buf);
255 } 255 }
256 uint8_t tmss_old = gen->tmss; 256 uint8_t tmss_old = gen->tmss;
257 uint8_t old_z80_clock_bit = gen->vdp->test_regs[1] & 1;
257 gen->tmss = 0xFF; 258 gen->tmss = 0xFF;
258 while (buf->cur_pos < buf->size) 259 while (buf->cur_pos < buf->size)
259 { 260 {
260 load_section(buf); 261 load_section(buf);
261 } 262 }
284 cd->m68k->resume_pc = get_native_address_trans(cd->m68k, cd->m68k->last_prefetch_address); 285 cd->m68k->resume_pc = get_native_address_trans(cd->m68k, cd->m68k->last_prefetch_address);
285 } 286 }
286 #endif 287 #endif
287 free(buf->handlers); 288 free(buf->handlers);
288 buf->handlers = NULL; 289 buf->handlers = NULL;
290 uint8_t new_z80_clock_bit = gen->vdp->test_regs[1] & 1;
291 if (old_z80_clock_bit != new_z80_clock_bit) {
292 gen->z80->Z80_OPTS->gen.clock_divider = new_z80_clock_bit ? MCLKS_PER_YM : MCLKS_PER_Z80;
293 gen->psg->clock_inc = new_z80_clock_bit ? MCLKS_PER_YM * 16 : MCLKS_PER_PSG;
294 psg_adjust_master_clock(gen->psg, gen->master_clock);
295 z80_invalidate_code_range(gen->z80, 0, 0x4000);
296 z80_clock_divider_updated(gen->z80->Z80_OPTS);
297 }
289 } 298 }
290 299
291 static void deserialize(system_header *sys, uint8_t *data, size_t size) 300 static void deserialize(system_header *sys, uint8_t *data, size_t size)
292 { 301 {
293 genesis_context *gen = (genesis_context *)sys; 302 genesis_context *gen = (genesis_context *)sys;
1065 gen->bus_busy = 0; 1074 gen->bus_busy = 0;
1066 } 1075 }
1067 } 1076 }
1068 } else if (vdp_port < 0x18) { 1077 } else if (vdp_port < 0x18) {
1069 psg_write(gen->psg, value); 1078 psg_write(gen->psg, value);
1070 } else { 1079 } else if (vdp_port < 0x1C) {
1080 vdp_test_port_select(gen->vdp, value);
1081 } else {
1082 uint8_t old_z80_clock_bit = gen->vdp->test_regs[1] & 1;
1071 vdp_test_port_write(gen->vdp, value); 1083 vdp_test_port_write(gen->vdp, value);
1084 uint8_t new_z80_clock_bit = gen->vdp->test_regs[1] & 1;
1085 if (old_z80_clock_bit != new_z80_clock_bit) {
1086 gen->z80->Z80_OPTS->gen.clock_divider = new_z80_clock_bit ? MCLKS_PER_YM : MCLKS_PER_Z80;
1087 gen->psg->clock_inc = new_z80_clock_bit ? MCLKS_PER_YM * 16 : MCLKS_PER_PSG;
1088 psg_adjust_master_clock(gen->psg, gen->master_clock);
1089 z80_invalidate_code_range(gen->z80, 0, 0x4000);
1090 z80_clock_divider_updated(gen->z80->Z80_OPTS);
1091 }
1072 } 1092 }
1073 1093
1074 if (did_dma) { 1094 if (did_dma) {
1075 gen->refresh_counter = 0; 1095 gen->refresh_counter = 0;
1076 gen->last_sync_cycle = context->cycles; 1096 gen->last_sync_cycle = context->cycles;