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comparison vdp.h @ 2675:dbff641a33df

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Implement Z80/PSG clock speed test register bit
author Michael Pavone <pavone@retrodev.com>
date Fri, 14 Mar 2025 01:18:11 -0700
parents 0da40b1978fd
children da2e06c42d16
comparison
equal deleted inserted replaced
2674:07cc0f7109f0 2675:dbff641a33df
234 uint8_t sat_cache[SAT_CACHE_SIZE]; 234 uint8_t sat_cache[SAT_CACHE_SIZE];
235 uint16_t col_1; 235 uint16_t col_1;
236 uint16_t col_2; 236 uint16_t col_2;
237 uint16_t hv_latch; 237 uint16_t hv_latch;
238 uint16_t prefetch; 238 uint16_t prefetch;
239 uint16_t test_port; 239 uint16_t test_regs[8];
240 //stores 2-bit palette + 4-bit palette index + priority for current sprite line 240 //stores 2-bit palette + 4-bit palette index + priority for current sprite line
241 uint8_t linebuf[LINEBUF_SIZE]; 241 uint8_t linebuf[LINEBUF_SIZE];
242 uint8_t compositebuf[LINEBUF_SIZE]; 242 uint8_t compositebuf[LINEBUF_SIZE];
243 uint8_t layer_debug_buf[LINEBUF_SIZE]; 243 uint8_t layer_debug_buf[LINEBUF_SIZE];
244 uint8_t hslot; //hcounter/2 244 uint8_t hslot; //hcounter/2
267 uint8_t pushed_frame; 267 uint8_t pushed_frame;
268 uint8_t type; 268 uint8_t type;
269 uint8_t cram_latch; 269 uint8_t cram_latch;
270 uint8_t window_h_latch; 270 uint8_t window_h_latch;
271 uint8_t window_v_latch; 271 uint8_t window_v_latch;
272 uint8_t selected_test_reg;
272 int32_t color_map[1 << 12]; 273 int32_t color_map[1 << 12];
273 uint8_t vdpmem[]; 274 uint8_t vdpmem[];
274 }; 275 };
275 276
276 277
287 uint8_t vdp_save_gst(vdp_context * context, FILE * outfile); 288 uint8_t vdp_save_gst(vdp_context * context, FILE * outfile);
288 int vdp_control_port_write(vdp_context * context, uint16_t value, uint32_t cpu_cycle); 289 int vdp_control_port_write(vdp_context * context, uint16_t value, uint32_t cpu_cycle);
289 void vdp_control_port_write_pbc(vdp_context * context, uint8_t value); 290 void vdp_control_port_write_pbc(vdp_context * context, uint8_t value);
290 void vdp_data_port_write(vdp_context * context, uint16_t value); 291 void vdp_data_port_write(vdp_context * context, uint16_t value);
291 void vdp_data_port_write_pbc(vdp_context * context, uint8_t value); 292 void vdp_data_port_write_pbc(vdp_context * context, uint8_t value);
293 void vdp_test_port_select(vdp_context * context, uint16_t value);
292 void vdp_test_port_write(vdp_context * context, uint16_t value); 294 void vdp_test_port_write(vdp_context * context, uint16_t value);
293 uint16_t vdp_control_port_read(vdp_context * context); 295 uint16_t vdp_control_port_read(vdp_context * context);
294 uint16_t vdp_data_port_read(vdp_context * context, uint32_t *cpu_cycle, uint32_t cpu_divider); 296 uint16_t vdp_data_port_read(vdp_context * context, uint32_t *cpu_cycle, uint32_t cpu_divider);
295 uint8_t vdp_data_port_read_pbc(vdp_context * context); 297 uint8_t vdp_data_port_read_pbc(vdp_context * context);
296 void vdp_latch_hv(vdp_context *context); 298 void vdp_latch_hv(vdp_context *context);