Mercurial > repos > blastem
comparison vdp.h @ 1120:e9369d6f0101
Somewhat broken implementation of Mode 4
author | Michael Pavone <pavone@retrodev.com> |
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date | Tue, 27 Dec 2016 11:31:17 -0800 |
parents | 928a65750345 |
children | 8506b305e0e8 |
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1119:55ea7f9a4e92 | 1120:e9369d6f0101 |
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16 #define VRAM_SIZE (64*1024) | 16 #define VRAM_SIZE (64*1024) |
17 #define LINEBUF_SIZE (320+27) //H40 + full border | 17 #define LINEBUF_SIZE (320+27) //H40 + full border |
18 #define BORDER_BOTTOM 13 //TODO: Replace with actual value | 18 #define BORDER_BOTTOM 13 //TODO: Replace with actual value |
19 #define MAX_DRAWS 40 | 19 #define MAX_DRAWS 40 |
20 #define MAX_DRAWS_H32 32 | 20 #define MAX_DRAWS_H32 32 |
21 #define MAX_DRAWS_H32_MODE4 16 | |
21 #define MAX_SPRITES_LINE 20 | 22 #define MAX_SPRITES_LINE 20 |
22 #define MAX_SPRITES_LINE_H32 16 | 23 #define MAX_SPRITES_LINE_H32 16 |
23 #define MAX_SPRITES_FRAME 80 | 24 #define MAX_SPRITES_FRAME 80 |
24 #define MAX_SPRITES_FRAME_H32 64 | 25 #define MAX_SPRITES_FRAME_H32 64 |
25 #define SAT_CACHE_SIZE (MAX_SPRITES_FRAME * 4) | 26 #define SAT_CACHE_SIZE (MAX_SPRITES_FRAME * 4) |
26 | 27 |
27 #define FBUF_SHADOW 0x0001 | 28 #define FBUF_SHADOW 0x0001 |
28 #define FBUF_HILIGHT 0x0010 | 29 #define FBUF_HILIGHT 0x0010 |
30 #define FBUF_MODE4 0x0100 | |
29 #define DBG_SHADOW 0x10 | 31 #define DBG_SHADOW 0x10 |
30 #define DBG_HILIGHT 0x20 | 32 #define DBG_HILIGHT 0x20 |
31 #define DBG_PRIORITY 0x8 | 33 #define DBG_PRIORITY 0x8 |
32 #define DBG_SRC_MASK 0x7 | 34 #define DBG_SRC_MASK 0x7 |
33 #define DBG_SRC_A 0x1 | 35 #define DBG_SRC_A 0x1 |
62 REG_MODE_2, | 64 REG_MODE_2, |
63 REG_SCROLL_A, | 65 REG_SCROLL_A, |
64 REG_WINDOW, | 66 REG_WINDOW, |
65 REG_SCROLL_B, | 67 REG_SCROLL_B, |
66 REG_SAT, | 68 REG_SAT, |
67 REG_BG_COLOR=7, | 69 REG_STILE_BASE, |
68 REG_HINT=0xA, | 70 REG_BG_COLOR, |
71 REG_X_SCROLL, | |
72 REG_Y_SCROLL, | |
73 REG_HINT, | |
69 REG_MODE_3, | 74 REG_MODE_3, |
70 REG_MODE_4, | 75 REG_MODE_4, |
71 REG_HSCROLL, | 76 REG_HSCROLL, |
72 REG_AUTOINC=0xF, | 77 REG_BGTILE_BASE, |
78 REG_AUTOINC, | |
73 REG_SCROLL, | 79 REG_SCROLL, |
74 REG_WINDOW_H, | 80 REG_WINDOW_H, |
75 REG_WINDOW_V, | 81 REG_WINDOW_V, |
76 REG_DMALEN_L, | 82 REG_DMALEN_L, |
77 REG_DMALEN_H, | 83 REG_DMALEN_H, |
79 REG_DMASRC_M, | 85 REG_DMASRC_M, |
80 REG_DMASRC_H | 86 REG_DMASRC_H |
81 } vdp_regs; | 87 } vdp_regs; |
82 | 88 |
83 //Mode reg 1 | 89 //Mode reg 1 |
90 #define BIT_VSCRL_LOCK 0x80 | |
91 #define BIT_HSCRL_LOCK 0x40 | |
92 #define BIT_COL0_MASK 0x20 | |
84 #define BIT_HINT_EN 0x10 | 93 #define BIT_HINT_EN 0x10 |
94 #define BIT_SPRITE_8PX 0x08 | |
85 #define BIT_PAL_SEL 0x04 | 95 #define BIT_PAL_SEL 0x04 |
96 #define BIT_MODE_4 BIT_PAL_SEL | |
86 #define BIT_HVC_LATCH 0x02 | 97 #define BIT_HVC_LATCH 0x02 |
87 #define BIT_DISP_DIS 0x01 | 98 #define BIT_DISP_DIS 0x01 |
88 | 99 |
89 //Mode reg 2 | 100 //Mode reg 2 |
90 #define BIT_DISP_EN 0x40 | 101 #define BIT_DISP_EN 0x40 |
91 #define BIT_VINT_EN 0x20 | 102 #define BIT_VINT_EN 0x20 |
92 #define BIT_DMA_ENABLE 0x10 | 103 #define BIT_DMA_ENABLE 0x10 |
93 #define BIT_PAL 0x08 | 104 #define BIT_PAL 0x08 |
94 #define BIT_MODE_5 0x04 | 105 #define BIT_MODE_5 0x04 |
106 #define BIT_SPRITE_SZ 0x02 | |
95 | 107 |
96 //Mode reg 3 | 108 //Mode reg 3 |
97 #define BIT_EINT_EN 0x10 | 109 #define BIT_EINT_EN 0x10 |
98 #define BIT_VSCROLL 0x04 | 110 #define BIT_VSCROLL 0x04 |
99 | 111 |
143 uint8_t *linebuf; | 155 uint8_t *linebuf; |
144 //pointer to current line in framebuffer | 156 //pointer to current line in framebuffer |
145 uint32_t *output; | 157 uint32_t *output; |
146 system_header *system; | 158 system_header *system; |
147 uint16_t cram[CRAM_SIZE]; | 159 uint16_t cram[CRAM_SIZE]; |
148 uint32_t colors[CRAM_SIZE*3]; | 160 uint32_t colors[CRAM_SIZE*4]; |
149 uint32_t debugcolors[1 << (3 + 1 + 1 + 1)];//3 bits for source, 1 bit for priority, 1 bit for shadow, 1 bit for hilight | 161 uint32_t debugcolors[1 << (3 + 1 + 1 + 1)];//3 bits for source, 1 bit for priority, 1 bit for shadow, 1 bit for hilight |
150 uint16_t vsram[VSRAM_SIZE]; | 162 uint16_t vsram[VSRAM_SIZE]; |
151 uint16_t vscroll_latch[2]; | 163 uint16_t vscroll_latch[2]; |
152 uint32_t output_pitch; | 164 uint32_t output_pitch; |
153 uint32_t frame; | 165 uint32_t frame; |
166 uint8_t sat_cache[SAT_CACHE_SIZE]; | 178 uint8_t sat_cache[SAT_CACHE_SIZE]; |
167 uint16_t col_1; | 179 uint16_t col_1; |
168 uint16_t col_2; | 180 uint16_t col_2; |
169 uint16_t hv_latch; | 181 uint16_t hv_latch; |
170 uint16_t prefetch; | 182 uint16_t prefetch; |
183 uint8_t fetch_tmp[2]; | |
171 uint8_t v_offset; | 184 uint8_t v_offset; |
172 uint8_t dma_cd; | 185 uint8_t dma_cd; |
173 uint8_t hint_counter; | 186 uint8_t hint_counter; |
174 uint8_t flags2; | 187 uint8_t flags2; |
175 uint8_t double_res; | 188 uint8_t double_res; |
208 void vdp_int_ack(vdp_context * context); | 221 void vdp_int_ack(vdp_context * context); |
209 void vdp_print_sprite_table(vdp_context * context); | 222 void vdp_print_sprite_table(vdp_context * context); |
210 void vdp_print_reg_explain(vdp_context * context); | 223 void vdp_print_reg_explain(vdp_context * context); |
211 void latch_mode(vdp_context * context); | 224 void latch_mode(vdp_context * context); |
212 uint32_t vdp_cycles_to_frame_end(vdp_context * context); | 225 uint32_t vdp_cycles_to_frame_end(vdp_context * context); |
226 void write_cram(vdp_context * context, uint16_t address, uint16_t value); | |
213 void write_vram_byte(vdp_context *context, uint16_t address, uint8_t value); | 227 void write_vram_byte(vdp_context *context, uint16_t address, uint8_t value); |
214 | 228 |
215 extern int32_t color_map[1 << 12]; | |
216 | |
217 #endif //VDP_H_ | 229 #endif //VDP_H_ |