Mercurial > repos > blastem

comparison m68k_to_x86.c @ 52:f02ba3808757

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Implement CLR, minor refactor of register offset calculation in context struct
author Mike Pavone <pavone@retrodev.com>
date Sun, 16 Dec 2012 21:57:52 -0800
parents 937b47c9b79b
children 44e661913a51
comparison
equal deleted inserted replaced
51:937b47c9b79b 52:f02ba3808757
57 } 57 }
58 if (op->addr_mode == MODE_AREG) { 58 if (op->addr_mode == MODE_AREG) {
59 return opts->aregs[op->params.regs.pri]; 59 return opts->aregs[op->params.regs.pri];
60 } 60 }
61 return -1; 61 return -1;
62 }
63
64 //must be called with an m68k_op_info that uses a register
65 size_t reg_offset(m68k_op_info *op)
66 {
67 if (op->addr_mode == MODE_REG) {
68 return offsetof(m68k_context, dregs) + sizeof(uint32_t) * op->params.regs.pri;
69 }
70 return offsetof(m68k_context, aregs) + sizeof(uint32_t) * op->params.regs.pri;
62 } 71 }
63 72
64 void print_regs_exit(m68k_context * context) 73 void print_regs_exit(m68k_context * context)
65 { 74 {
66 printf("XNVZC\n%d%d%d%d%d\n", context->flags[0], context->flags[1], context->flags[2], context->flags[3], context->flags[4]); 75 printf("XNVZC\n%d%d%d%d%d\n", context->flags[0], context->flags[1], context->flags[2], context->flags[3], context->flags[4]);
92 if (reg >= 0 || inst->dst.addr_mode == MODE_UNUSED || (inst->dst.addr_mode != MODE_REG && inst->dst.addr_mode == MODE_AREG) 101 if (reg >= 0 || inst->dst.addr_mode == MODE_UNUSED || (inst->dst.addr_mode != MODE_REG && inst->dst.addr_mode == MODE_AREG)
93 || inst->op == M68K_EXG) { 102 || inst->op == M68K_EXG) {
94 103
95 ea->mode = MODE_REG_DISPLACE8; 104 ea->mode = MODE_REG_DISPLACE8;
96 ea->base = CONTEXT; 105 ea->base = CONTEXT;
97 ea->disp = (inst->src.addr_mode == MODE_REG ? offsetof(m68k_context, dregs) : offsetof(m68k_context, aregs)) + 4 * inst->src.params.regs.pri; 106 ea->disp = reg_offset(&(inst->src));
98 } else { 107 } else {
99 out = mov_rdisp8r(out, CONTEXT, (inst->src.addr_mode == MODE_REG ? offsetof(m68k_context, dregs) : offsetof(m68k_context, aregs)) + 4 * inst->src.params.regs.pri, SCRATCH1, inst->extra.size); 108 out = mov_rdisp8r(out, CONTEXT, reg_offset(&(inst->src)), SCRATCH1, inst->extra.size);
100 ea->mode = MODE_REG_DIRECT; 109 ea->mode = MODE_REG_DIRECT;
101 ea->base = SCRATCH1; 110 ea->base = SCRATCH1;
102 } 111 }
103 break; 112 break;
104 case MODE_AREG_PREDEC: 113 case MODE_AREG_PREDEC:
105 dec_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : 1); 114 dec_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : 1);
106 out = cycles(out, PREDEC_PENALTY); 115 out = cycles(out, PREDEC_PENALTY);
107 if (opts->aregs[inst->src.params.regs.pri] >= 0) { 116 if (opts->aregs[inst->src.params.regs.pri] >= 0) {
108 out = sub_ir(out, inc_amount, opts->aregs[inst->src.params.regs.pri], SZ_D); 117 out = sub_ir(out, inc_amount, opts->aregs[inst->src.params.regs.pri], SZ_D);
109 } else { 118 } else {
110 out = sub_irdisp8(out, inc_amount, CONTEXT, offsetof(m68k_context, aregs) + 4 * inst->src.params.regs.pri, SZ_D); 119 out = sub_irdisp8(out, inc_amount, CONTEXT, reg_offset(&(inst->src)), SZ_D);
111 } 120 }
112 out = check_cycles(out); 121 out = check_cycles(out);
113 case MODE_AREG_INDIRECT: 122 case MODE_AREG_INDIRECT:
114 case MODE_AREG_POSTINC: 123 case MODE_AREG_POSTINC:
115 if (opts->aregs[inst->src.params.regs.pri] >= 0) { 124 if (opts->aregs[inst->src.params.regs.pri] >= 0) {
116 out = mov_rr(out, opts->aregs[inst->src.params.regs.pri], SCRATCH1, SZ_D); 125 out = mov_rr(out, opts->aregs[inst->src.params.regs.pri], SCRATCH1, SZ_D);
117 } else { 126 } else {
118 out = mov_rdisp8r(out, CONTEXT, offsetof(m68k_context, aregs) + 4 * inst->src.params.regs.pri, SCRATCH1, SZ_D); 127 out = mov_rdisp8r(out, CONTEXT, reg_offset(&(inst->src)), SCRATCH1, SZ_D);
119 } 128 }
120 switch (inst->extra.size) 129 switch (inst->extra.size)
121 { 130 {
122 case OPSIZE_BYTE: 131 case OPSIZE_BYTE:
123 out = call(out, (char *)m68k_read_byte_scratch1); 132 out = call(out, (char *)m68k_read_byte_scratch1);
133 if (inst->src.addr_mode == MODE_AREG_POSTINC) { 142 if (inst->src.addr_mode == MODE_AREG_POSTINC) {
134 inc_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : 1); 143 inc_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : 1);
135 if (opts->aregs[inst->src.params.regs.pri] >= 0) { 144 if (opts->aregs[inst->src.params.regs.pri] >= 0) {
136 out = add_ir(out, inc_amount, opts->aregs[inst->src.params.regs.pri], SZ_D); 145 out = add_ir(out, inc_amount, opts->aregs[inst->src.params.regs.pri], SZ_D);
137 } else { 146 } else {
138 out = add_irdisp8(out, inc_amount, CONTEXT, offsetof(m68k_context, aregs) + 4 * inst->src.params.regs.pri, SZ_D); 147 out = add_irdisp8(out, inc_amount, CONTEXT, reg_offset(&(inst->src)), SZ_D);
139 } 148 }
140 } 149 }
141 ea->mode = MODE_REG_DIRECT; 150 ea->mode = MODE_REG_DIRECT;
142 ea->base = SCRATCH1; 151 ea->base = SCRATCH1;
143 break; 152 break;
173 { 182 {
174 case MODE_REG: 183 case MODE_REG:
175 case MODE_AREG: 184 case MODE_AREG:
176 ea->mode = MODE_REG_DISPLACE8; 185 ea->mode = MODE_REG_DISPLACE8;
177 ea->base = CONTEXT; 186 ea->base = CONTEXT;
178 ea->disp = (inst->dst.addr_mode == MODE_REG ? offsetof(m68k_context, dregs) : offsetof(m68k_context, aregs)) + 4 * inst->dst.params.regs.pri; 187 ea->disp = reg_offset(&(inst->dst));
179 break; 188 break;
180 case MODE_AREG_PREDEC: 189 case MODE_AREG_PREDEC:
181 dec_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : 1); 190 dec_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : 1);
182 if (opts->aregs[inst->dst.params.regs.pri] >= 0) { 191 if (opts->aregs[inst->dst.params.regs.pri] >= 0) {
183 out = sub_ir(out, dec_amount, opts->aregs[inst->dst.params.regs.pri], SZ_D); 192 out = sub_ir(out, dec_amount, opts->aregs[inst->dst.params.regs.pri], SZ_D);
184 } else { 193 } else {
185 out = sub_irdisp8(out, dec_amount, CONTEXT, offsetof(m68k_context, aregs) + 4 * inst->dst.params.regs.pri, SZ_D); 194 out = sub_irdisp8(out, dec_amount, CONTEXT, reg_offset(&(inst->dst)), SZ_D);
186 } 195 }
187 case MODE_AREG_INDIRECT: 196 case MODE_AREG_INDIRECT:
188 case MODE_AREG_POSTINC: 197 case MODE_AREG_POSTINC:
189 if (opts->aregs[inst->dst.params.regs.pri] >= 0) { 198 if (opts->aregs[inst->dst.params.regs.pri] >= 0) {
190 out = mov_rr(out, opts->aregs[inst->dst.params.regs.pri], SCRATCH1, SZ_D); 199 out = mov_rr(out, opts->aregs[inst->dst.params.regs.pri], SCRATCH1, SZ_D);
191 } else { 200 } else {
192 out = mov_rdisp8r(out, CONTEXT, offsetof(m68k_context, aregs) + 4 * inst->dst.params.regs.pri, SCRATCH1, SZ_D); 201 out = mov_rdisp8r(out, CONTEXT, reg_offset(&(inst->dst)), SCRATCH1, SZ_D);
193 } 202 }
194 switch (inst->extra.size) 203 switch (inst->extra.size)
195 { 204 {
196 case OPSIZE_BYTE: 205 case OPSIZE_BYTE:
197 out = call(out, (char *)m68k_read_byte_scratch1); 206 out = call(out, (char *)m68k_read_byte_scratch1);
205 } 214 }
206 //save reg value in SCRATCH2 so we can use it to save the result in memory later 215 //save reg value in SCRATCH2 so we can use it to save the result in memory later
207 if (opts->aregs[inst->dst.params.regs.pri] >= 0) { 216 if (opts->aregs[inst->dst.params.regs.pri] >= 0) {
208 out = mov_rr(out, opts->aregs[inst->dst.params.regs.pri], SCRATCH2, SZ_D); 217 out = mov_rr(out, opts->aregs[inst->dst.params.regs.pri], SCRATCH2, SZ_D);
209 } else { 218 } else {
210 out = mov_rdisp8r(out, CONTEXT, offsetof(m68k_context, aregs) + 4 * inst->dst.params.regs.pri, SCRATCH2, SZ_D); 219 out = mov_rdisp8r(out, CONTEXT, reg_offset(&(inst->dst)), SCRATCH2, SZ_D);
211 } 220 }
212 221
213 if (inst->src.addr_mode == MODE_AREG_POSTINC) { 222 if (inst->src.addr_mode == MODE_AREG_POSTINC) {
214 inc_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : 1); 223 inc_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : 1);
215 if (opts->aregs[inst->dst.params.regs.pri] >= 0) { 224 if (opts->aregs[inst->dst.params.regs.pri] >= 0) {
216 out = add_ir(out, inc_amount, opts->aregs[inst->dst.params.regs.pri], SZ_D); 225 out = add_ir(out, inc_amount, opts->aregs[inst->dst.params.regs.pri], SZ_D);
217 } else { 226 } else {
218 out = add_irdisp8(out, inc_amount, CONTEXT, offsetof(m68k_context, aregs) + 4 * inst->dst.params.regs.pri, SZ_D); 227 out = add_irdisp8(out, inc_amount, CONTEXT, reg_offset(&(inst->dst)), SZ_D);
219 } 228 }
220 } 229 }
221 ea->mode = MODE_REG_DIRECT; 230 ea->mode = MODE_REG_DIRECT;
222 ea->base = SCRATCH1; 231 ea->base = SCRATCH1;
223 break; 232 break;
345 dst = mov_rdisp8r(dst, src.base, src.disp, reg, inst->extra.size); 354 dst = mov_rdisp8r(dst, src.base, src.disp, reg, inst->extra.size);
346 } else { 355 } else {
347 dst = mov_ir(dst, src.disp, reg, inst->extra.size); 356 dst = mov_ir(dst, src.disp, reg, inst->extra.size);
348 } 357 }
349 } else if(src.mode == MODE_REG_DIRECT) { 358 } else if(src.mode == MODE_REG_DIRECT) {
350 printf("mov_rrdisp8 from reg %d to offset %d from reg %d (%d)\n", src.base, (int)(inst->dst.addr_mode == MODE_REG ? offsetof(m68k_context, dregs) : offsetof(m68k_context, aregs)) + 4 * inst->dst.params.regs.pri, CONTEXT, inst->dst.params.regs.pri); 359 printf("mov_rrdisp8 from reg %d to offset %d from reg %d (%d)\n", src.base, (int)reg_offset(&(inst->dst)), CONTEXT, inst->dst.params.regs.pri);
351 dst = mov_rrdisp8(dst, src.base, CONTEXT, (inst->dst.addr_mode == MODE_REG ? offsetof(m68k_context, dregs) : offsetof(m68k_context, aregs)) + 4 * inst->dst.params.regs.pri, inst->extra.size); 360 dst = mov_rrdisp8(dst, src.base, CONTEXT, reg_offset(&(inst->dst)), inst->extra.size);
352 } else { 361 } else {
353 dst = mov_irdisp8(dst, src.disp, CONTEXT, (inst->dst.addr_mode == MODE_REG ? offsetof(m68k_context, dregs) : offsetof(m68k_context, aregs)) + 4 * inst->dst.params.regs.pri, inst->extra.size); 362 dst = mov_irdisp8(dst, src.disp, CONTEXT, reg_offset(&(inst->dst)), inst->extra.size);
354 } 363 }
355 break; 364 break;
356 case MODE_AREG_PREDEC: 365 case MODE_AREG_PREDEC:
357 dec_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : 1); 366 dec_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : 1);
358 if (opts->aregs[inst->dst.params.regs.pri] >= 0) { 367 if (opts->aregs[inst->dst.params.regs.pri] >= 0) {
359 dst = sub_ir(dst, dec_amount, opts->aregs[inst->dst.params.regs.pri], SZ_D); 368 dst = sub_ir(dst, dec_amount, opts->aregs[inst->dst.params.regs.pri], SZ_D);
360 } else { 369 } else {
361 dst = sub_irdisp8(dst, dec_amount, CONTEXT, offsetof(m68k_context, aregs) + 4 * inst->dst.params.regs.pri, SZ_D); 370 dst = sub_irdisp8(dst, dec_amount, CONTEXT, reg_offset(&(inst->dst)), SZ_D);
362 } 371 }
363 case MODE_AREG_INDIRECT: 372 case MODE_AREG_INDIRECT:
364 case MODE_AREG_POSTINC: 373 case MODE_AREG_POSTINC:
365 if (opts->aregs[inst->dst.params.regs.pri] >= 0) { 374 if (opts->aregs[inst->dst.params.regs.pri] >= 0) {
366 dst = mov_rr(dst, opts->aregs[inst->dst.params.regs.pri], SCRATCH2, SZ_D); 375 dst = mov_rr(dst, opts->aregs[inst->dst.params.regs.pri], SCRATCH2, SZ_D);
367 } else { 376 } else {
368 dst = mov_rdisp8r(dst, CONTEXT, offsetof(m68k_context, aregs) + 4 * inst->dst.params.regs.pri, SCRATCH2, SZ_D); 377 dst = mov_rdisp8r(dst, CONTEXT, reg_offset(&(inst->dst)), SCRATCH2, SZ_D);
369 } 378 }
370 if (src.mode == MODE_REG_DIRECT) { 379 if (src.mode == MODE_REG_DIRECT) {
371 if (src.base != SCRATCH1) { 380 if (src.base != SCRATCH1) {
372 dst = mov_rr(dst, src.base, SCRATCH1, inst->extra.size); 381 dst = mov_rr(dst, src.base, SCRATCH1, inst->extra.size);
373 } 382 }
391 if (inst->dst.addr_mode == MODE_AREG_POSTINC) { 400 if (inst->dst.addr_mode == MODE_AREG_POSTINC) {
392 inc_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : 1); 401 inc_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : 1);
393 if (opts->aregs[inst->dst.params.regs.pri] >= 0) { 402 if (opts->aregs[inst->dst.params.regs.pri] >= 0) {
394 dst = add_ir(dst, inc_amount, opts->aregs[inst->dst.params.regs.pri], SZ_D); 403 dst = add_ir(dst, inc_amount, opts->aregs[inst->dst.params.regs.pri], SZ_D);
395 } else { 404 } else {
396 dst = add_irdisp8(dst, inc_amount, CONTEXT, offsetof(m68k_context, aregs) + 4 * inst->dst.params.regs.pri, SZ_D); 405 dst = add_irdisp8(dst, inc_amount, CONTEXT, reg_offset(&(inst->dst)), SZ_D);
397 } 406 }
398 } 407 }
399 break; 408 break;
400 default: 409 default:
401 printf("address mode %d not implemented (move dst)\n", inst->dst.addr_mode); 410 printf("address mode %d not implemented (move dst)\n", inst->dst.addr_mode);
409 dst = mov_ir(dst, 0, FLAG_C, SZ_B); 418 dst = mov_ir(dst, 0, FLAG_C, SZ_B);
410 dst = cmp_ir(dst, 0, flags_reg, inst->extra.size); 419 dst = cmp_ir(dst, 0, flags_reg, inst->extra.size);
411 dst = setcc_r(dst, CC_Z, FLAG_Z); 420 dst = setcc_r(dst, CC_Z, FLAG_Z);
412 dst = setcc_r(dst, CC_S, FLAG_N); 421 dst = setcc_r(dst, CC_S, FLAG_N);
413 dst = check_cycles(dst); 422 dst = check_cycles(dst);
423 return dst;
424 }
425
426 uint8_t * translate_m68k_clr(uint8_t * dst, m68kinst * inst, x86_68k_options * opts)
427 {
428 dst = mov_ir(dst, 0, FLAG_N, SZ_B);
429 dst = mov_ir(dst, 0, FLAG_V, SZ_B);
430 dst = mov_ir(dst, 0, FLAG_C, SZ_B);
431 dst = mov_ir(dst, 1, FLAG_Z, SZ_B);
432 uint8_t reg = native_reg(&(inst->dst), opts);
433 if (reg >= 0) {
434 dst = xor_rr(dst, reg, reg, inst->extra.size);
435 return check_cycles(dst);
436 }
437 int32_t dec_amount,inc_amount;
438 switch (inst->dst.addr_mode)
439 {
440 case MODE_REG:
441 case MODE_AREG:
442 dst = cycles(dst, (inst->extra.size == OPSIZE_LONG ? 6 : 4));
443 dst = mov_irdisp8(dst, 0, CONTEXT, reg_offset(&(inst->dst)), inst->extra.size);
444 dst = check_cycles(dst);
445 break;
446 case MODE_AREG_PREDEC:
447 dst = cycles(dst, PREDEC_PENALTY);
448 dec_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : 1);
449 if (opts->aregs[inst->dst.params.regs.pri] >= 0) {
450 dst = sub_ir(dst, dec_amount, opts->aregs[inst->dst.params.regs.pri], SZ_D);
451 } else {
452 dst = sub_irdisp8(dst, dec_amount, CONTEXT, reg_offset(&(inst->dst)), SZ_D);
453 }
454 case MODE_AREG_INDIRECT:
455 case MODE_AREG_POSTINC:
456 //add cycles for prefetch and wasted read
457 dst = cycles(dst, (inst->extra.size == OPSIZE_LONG ? 12 : 8));
458 dst = check_cycles(dst);
459 if (opts->aregs[inst->dst.params.regs.pri] >= 0) {
460 dst = mov_rr(dst, opts->aregs[inst->dst.params.regs.pri], SCRATCH2, SZ_D);
461 } else {
462 dst = mov_rdisp8r(dst, CONTEXT, reg_offset(&(inst->dst)), SCRATCH2, SZ_D);
463 }
464 dst = xor_rr(dst, SCRATCH1, SCRATCH1, SZ_D);
465 switch (inst->extra.size)
466 {
467 case OPSIZE_BYTE:
468 dst = call(dst, (char *)m68k_write_byte);
469 break;
470 case OPSIZE_WORD:
471 dst = call(dst, (char *)m68k_write_word);
472 break;
473 case OPSIZE_LONG:
474 dst = call(dst, (char *)m68k_write_long_highfirst);
475 break;
476 }
477 if (inst->dst.addr_mode == MODE_AREG_POSTINC) {
478 inc_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : 1);
479 if (opts->aregs[inst->dst.params.regs.pri] >= 0) {
480 dst = add_ir(dst, inc_amount, opts->aregs[inst->dst.params.regs.pri], SZ_D);
481 } else {
482 dst = add_irdisp8(dst, inc_amount, CONTEXT, reg_offset(&(inst->dst)), SZ_D);
483 }
484 }
485 break;
486 }
414 return dst; 487 return dst;
415 } 488 }
416 489
417 uint8_t * translate_m68k_lea(uint8_t * dst, m68kinst * inst, x86_68k_options * opts) 490 uint8_t * translate_m68k_lea(uint8_t * dst, m68kinst * inst, x86_68k_options * opts)
418 { 491 {
636 dst = cycles(dst, 2); 709 dst = cycles(dst, 2);
637 } else { 710 } else {
638 dst = cycles(dst, 4); 711 dst = cycles(dst, 4);
639 } 712 }
640 dst = check_cycles(dst); 713 dst = check_cycles(dst);
714 return dst;
641 } 715 }
642 716
643 typedef uint8_t * (*shift_ir_t)(uint8_t * out, uint8_t val, uint8_t dst, uint8_t size); 717 typedef uint8_t * (*shift_ir_t)(uint8_t * out, uint8_t val, uint8_t dst, uint8_t size);
644 typedef uint8_t * (*shift_irdisp8_t)(uint8_t * out, uint8_t val, uint8_t dst_base, int8_t disp, uint8_t size); 718 typedef uint8_t * (*shift_irdisp8_t)(uint8_t * out, uint8_t val, uint8_t dst_base, int8_t disp, uint8_t size);
645 typedef uint8_t * (*shift_clr_t)(uint8_t * out, uint8_t dst, uint8_t size); 719 typedef uint8_t * (*shift_clr_t)(uint8_t * out, uint8_t dst, uint8_t size);
757 return translate_m68k_bcc(dst, inst, opts); 831 return translate_m68k_bcc(dst, inst, opts);
758 } else if(inst->op == M68K_RTS) { 832 } else if(inst->op == M68K_RTS) {
759 return translate_m68k_rts(dst, inst, opts); 833 return translate_m68k_rts(dst, inst, opts);
760 } else if(inst->op == M68K_DBCC) { 834 } else if(inst->op == M68K_DBCC) {
761 return translate_m68k_dbcc(dst, inst, opts); 835 return translate_m68k_dbcc(dst, inst, opts);
836 } else if(inst->op == M68K_CLR) {
837 return translate_m68k_clr(dst, inst, opts);
762 } 838 }
763 x86_ea src_op, dst_op; 839 x86_ea src_op, dst_op;
764 if (inst->src.addr_mode != MODE_UNUSED) { 840 if (inst->src.addr_mode != MODE_UNUSED) {
765 dst = translate_m68k_src(inst, &src_op, dst, opts); 841 dst = translate_m68k_src(inst, &src_op, dst, opts);
766 } 842 }
838 case M68K_BCHG: 914 case M68K_BCHG:
839 case M68K_BCLR: 915 case M68K_BCLR:
840 case M68K_BSET: 916 case M68K_BSET:
841 case M68K_BTST: 917 case M68K_BTST:
842 case M68K_CHK: 918 case M68K_CHK:
843 case M68K_CLR:
844 break; 919 break;
845 case M68K_CMP: 920 case M68K_CMP:
846 dst = cycles(dst, BUS); 921 dst = cycles(dst, BUS);
847 if (src_op.mode == MODE_REG_DIRECT) { 922 if (src_op.mode == MODE_REG_DIRECT) {
848 if (dst_op.mode == MODE_REG_DIRECT) { 923 if (dst_op.mode == MODE_REG_DIRECT) {