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comparison m68k_core_x86.c @ 837:f2cd380adebe

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Implement TAS
author Michael Pavone <pavone@retrodev.com>
date Wed, 28 Oct 2015 19:45:24 -0700
parents 65f9041b5f17
children 4556818b6847
comparison
equal deleted inserted replaced
836:124a58fdcf3a 837:f2cd380adebe
1308 if (inst->dst.addr_mode == MODE_AREG && size == OPSIZE_WORD) { 1308 if (inst->dst.addr_mode == MODE_AREG && size == OPSIZE_WORD) {
1309 size = OPSIZE_LONG; 1309 size = OPSIZE_LONG;
1310 } 1310 }
1311 } 1311 }
1312 translate_m68k_arith(opts, inst, N|Z|V|C, &src_op, &dst_op); 1312 translate_m68k_arith(opts, inst, N|Z|V|C, &src_op, &dst_op);
1313 }
1314
1315 void translate_m68k_tas(m68k_options *opts, m68kinst *inst)
1316 {
1317 code_info *code = &opts->gen.code;
1318 host_ea op;
1319 translate_m68k_op(inst, &op, opts, 1);
1320 if (op.mode == MODE_REG_DIRECT) {
1321 cmp_ir(code, 0, op.base, SZ_B);
1322 } else {
1323 cmp_irdisp(code, 0, op.base, op.disp, SZ_B);
1324 }
1325 update_flags(opts, N|Z|V0|C0);
1326 if (inst->dst.addr_mode == MODE_REG) {
1327 cycles(&opts->gen, BUS);
1328 if (op.mode == MODE_REG_DIRECT) {
1329 bts_ir(code, 7, op.base, SZ_B);
1330 } else {
1331 bts_irdisp(code, 7, op.base, op.disp, SZ_B);
1332 }
1333 } else {
1334 if (opts->gen.flags & M68K_OPT_BROKEN_READ_MODIFY) {
1335 //2 cycles for processing
1336 //4 for failed writeback
1337 //4 for prefetch
1338 cycles(&opts->gen, BUS * 2 + 2);
1339 } else {
1340 cycles(&opts->gen, 2);
1341 bts_ir(code, 7, op.base, SZ_B);
1342 m68k_save_result(inst, opts);
1343 cycles(&opts->gen, BUS);
1344 }
1345 }
1313 } 1346 }
1314 1347
1315 void op_r(code_info *code, m68kinst *inst, uint8_t dst, uint8_t size) 1348 void op_r(code_info *code, m68kinst *inst, uint8_t dst, uint8_t size)
1316 { 1349 {
1317 switch(inst->op) 1350 switch(inst->op)