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comparison m68k_to_x86.c @ 196:f8955d33486d

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Implement pc indexed mode as move dst
author Mike Pavone <pavone@retrodev.com>
date Thu, 17 Jan 2013 08:19:29 -0800
parents 811163790e6c
children 7c227a8ec53d
comparison
equal deleted inserted replaced
195:c615061f7914 196:f8955d33486d
1010 } 1010 }
1011 break; 1011 break;
1012 case MODE_PC_DISPLACE: 1012 case MODE_PC_DISPLACE:
1013 dst = cycles(dst, BUS); 1013 dst = cycles(dst, BUS);
1014 dst = mov_ir(dst, inst->dst.params.regs.displacement + inst->address+2, SCRATCH2, SZ_D); 1014 dst = mov_ir(dst, inst->dst.params.regs.displacement + inst->address+2, SCRATCH2, SZ_D);
1015 if (src.mode == MODE_REG_DIRECT) {
1016 if (src.base != SCRATCH1) {
1017 dst = mov_rr(dst, src.base, SCRATCH1, inst->extra.size);
1018 }
1019 } else if (src.mode == MODE_REG_DISPLACE8) {
1020 dst = mov_rdisp8r(dst, src.base, src.disp, SCRATCH1, inst->extra.size);
1021 } else {
1022 dst = mov_ir(dst, src.disp, SCRATCH1, inst->extra.size);
1023 }
1024 if (inst->dst.addr_mode != MODE_AREG) {
1025 dst = cmp_ir(dst, 0, flags_reg, inst->extra.size);
1026 dst = setcc_r(dst, CC_Z, FLAG_Z);
1027 dst = setcc_r(dst, CC_S, FLAG_N);
1028 }
1029 switch (inst->extra.size)
1030 {
1031 case OPSIZE_BYTE:
1032 dst = call(dst, (char *)m68k_write_byte);
1033 break;
1034 case OPSIZE_WORD:
1035 dst = call(dst, (char *)m68k_write_word);
1036 break;
1037 case OPSIZE_LONG:
1038 dst = call(dst, (char *)m68k_write_long_highfirst);
1039 break;
1040 }
1041 break;
1042 case MODE_PC_INDEX_DISP8:
1043 dst = cycles(dst, 6);//TODO: Check to make sure this is correct
1044 dst = mov_ir(dst, inst->address, SCRATCH2, SZ_D);
1045 sec_reg = (inst->dst.params.regs.sec >> 1) & 0x7;
1046 if (inst->dst.params.regs.sec & 1) {
1047 if (inst->dst.params.regs.sec & 0x10) {
1048 if (opts->aregs[sec_reg] >= 0) {
1049 dst = add_rr(dst, opts->aregs[sec_reg], SCRATCH2, SZ_D);
1050 } else {
1051 dst = add_rdisp8r(dst, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t)*sec_reg, SCRATCH2, SZ_D);
1052 }
1053 } else {
1054 if (opts->dregs[sec_reg] >= 0) {
1055 dst = add_rr(dst, opts->dregs[sec_reg], SCRATCH2, SZ_D);
1056 } else {
1057 dst = add_rdisp8r(dst, CONTEXT, offsetof(m68k_context, dregs) + sizeof(uint32_t)*sec_reg, SCRATCH2, SZ_D);
1058 }
1059 }
1060 } else {
1061 if (src.base == SCRATCH1) {
1062 dst = push_r(dst, SCRATCH1);
1063 }
1064 if (inst->dst.params.regs.sec & 0x10) {
1065 if (opts->aregs[sec_reg] >= 0) {
1066 dst = movsx_rr(dst, opts->aregs[sec_reg], SCRATCH1, SZ_W, SZ_D);
1067 } else {
1068 dst = movsx_rdisp8r(dst, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t)*sec_reg, SCRATCH1, SZ_W, SZ_D);
1069 }
1070 } else {
1071 if (opts->dregs[sec_reg] >= 0) {
1072 dst = movsx_rr(dst, opts->dregs[sec_reg], SCRATCH1, SZ_W, SZ_D);
1073 } else {
1074 dst = movsx_rdisp8r(dst, CONTEXT, offsetof(m68k_context, dregs) + sizeof(uint32_t)*sec_reg, SCRATCH1, SZ_W, SZ_D);
1075 }
1076 }
1077 dst = add_rr(dst, SCRATCH1, SCRATCH2, SZ_D);
1078 if (src.base == SCRATCH1) {
1079 dst = pop_r(dst, SCRATCH1);
1080 }
1081 }
1082 if (inst->dst.params.regs.displacement) {
1083 dst = add_ir(dst, inst->dst.params.regs.displacement, SCRATCH2, SZ_D);
1084 }
1015 if (src.mode == MODE_REG_DIRECT) { 1085 if (src.mode == MODE_REG_DIRECT) {
1016 if (src.base != SCRATCH1) { 1086 if (src.base != SCRATCH1) {
1017 dst = mov_rr(dst, src.base, SCRATCH1, inst->extra.size); 1087 dst = mov_rr(dst, src.base, SCRATCH1, inst->extra.size);
1018 } 1088 }
1019 } else if (src.mode == MODE_REG_DISPLACE8) { 1089 } else if (src.mode == MODE_REG_DISPLACE8) {