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comparison z80_to_x86.c @ 287:fb840e0a48cd

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Implement RRD and implement flags on RLD
author Mike Pavone <pavone@retrodev.com>
date Sun, 05 May 2013 11:17:37 -0700
parents 872a8911e0f4
children b970ea214ecb
comparison
equal deleted inserted replaced
286:872a8911e0f4 287:fb840e0a48cd
1097 dst = or_rr(dst, SCRATCH2, SCRATCH1, SZ_W); 1097 dst = or_rr(dst, SCRATCH2, SCRATCH1, SZ_W);
1098 //SCRATCH1 = 0x0124 1098 //SCRATCH1 = 0x0124
1099 dst = ror_ir(dst, 8, SCRATCH1, SZ_W); 1099 dst = ror_ir(dst, 8, SCRATCH1, SZ_W);
1100 dst = zcycles(dst, 4); 1100 dst = zcycles(dst, 4);
1101 dst = or_rr(dst, SCRATCH1, opts->regs[Z80_A], SZ_B); 1101 dst = or_rr(dst, SCRATCH1, opts->regs[Z80_A], SZ_B);
1102 //set flags
1103 //TODO: Implement half-carry flag
1104 dst = mov_irdisp8(dst, 0, CONTEXT, zf_off(ZF_N), SZ_B);
1105 dst = setcc_rdisp8(dst, CC_P, CONTEXT, zf_off(ZF_PV));
1106 dst = setcc_rdisp8(dst, CC_Z, CONTEXT, zf_off(ZF_Z));
1107 dst = setcc_rdisp8(dst, CC_S, CONTEXT, zf_off(ZF_S));
1108
1102 dst = mov_rr(dst, opts->regs[Z80_HL], SCRATCH2, SZ_W); 1109 dst = mov_rr(dst, opts->regs[Z80_HL], SCRATCH2, SZ_W);
1103 dst = ror_ir(dst, 8, SCRATCH1, SZ_W); 1110 dst = ror_ir(dst, 8, SCRATCH1, SZ_W);
1104 dst = call(dst, (uint8_t *)z80_write_byte); 1111 dst = call(dst, (uint8_t *)z80_write_byte);
1105 break; 1112 break;
1106 //case Z80_RRD:*/ 1113 case Z80_RRD:
1114 dst = zcycles(dst, 8);
1115 dst = mov_rr(dst, opts->regs[Z80_HL], SCRATCH1, SZ_W);
1116 dst = call(dst, (uint8_t *)z80_read_byte);
1117 //Before: (HL) = 0x12, A = 0x34
1118 //After: (HL) = 0x41, A = 0x32
1119 dst = movzx_rr(dst, opts->regs[Z80_A], SCRATCH2, SZ_B, SZ_W);
1120 dst = ror_ir(dst, 4, SCRATCH1, SZ_W);
1121 dst = shl_ir(dst, 4, SCRATCH2, SZ_W);
1122 dst = and_ir(dst, 0xF00F, SCRATCH1, SZ_W);
1123 dst = and_ir(dst, 0xF0, opts->regs[Z80_A], SZ_B);
1124 //SCRATCH1 = 0x2001
1125 //SCRATCH2 = 0x0040
1126 dst = or_rr(dst, SCRATCH2, SCRATCH1, SZ_W);
1127 //SCRATCH1 = 0x2041
1128 dst = ror_ir(dst, 8, SCRATCH1, SZ_W);
1129 dst = zcycles(dst, 4);
1130 dst = shr_ir(dst, 4, SCRATCH1, SZ_B);
1131 dst = or_rr(dst, SCRATCH1, opts->regs[Z80_A], SZ_B);
1132 //set flags
1133 //TODO: Implement half-carry flag
1134 dst = mov_irdisp8(dst, 0, CONTEXT, zf_off(ZF_N), SZ_B);
1135 dst = setcc_rdisp8(dst, CC_P, CONTEXT, zf_off(ZF_PV));
1136 dst = setcc_rdisp8(dst, CC_Z, CONTEXT, zf_off(ZF_Z));
1137 dst = setcc_rdisp8(dst, CC_S, CONTEXT, zf_off(ZF_S));
1138
1139 dst = mov_rr(dst, opts->regs[Z80_HL], SCRATCH2, SZ_W);
1140 dst = ror_ir(dst, 8, SCRATCH1, SZ_W);
1141 dst = call(dst, (uint8_t *)z80_write_byte);
1142 break;
1107 case Z80_BIT: 1143 case Z80_BIT:
1108 cycles = (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) ? 8 : 16; 1144 cycles = (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) ? 8 : 16;
1109 dst = zcycles(dst, cycles); 1145 dst = zcycles(dst, cycles);
1110 dst = translate_z80_ea(inst, &src_op, dst, opts, READ, DONT_MODIFY); 1146 dst = translate_z80_ea(inst, &src_op, dst, opts, READ, DONT_MODIFY);
1111 if (inst->addr_mode != Z80_REG) { 1147 if (inst->addr_mode != Z80_REG) {