comparison backend_x86.c @ 690:fc04781f4d28

Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
author Michael Pavone <pavone@retrodev.com>
date Wed, 14 Jan 2015 09:38:54 -0800
parents 30ccf56842d6
children e11e68918691
comparison
equal deleted inserted replaced
689:858e31f977ae 690:fc04781f4d28
48 code_ptr lb_jcc = NULL, ub_jcc = NULL; 48 code_ptr lb_jcc = NULL, ub_jcc = NULL;
49 uint8_t is_write = fun_type == WRITE_16 || fun_type == WRITE_8; 49 uint8_t is_write = fun_type == WRITE_16 || fun_type == WRITE_8;
50 uint8_t adr_reg = is_write ? opts->scratch2 : opts->scratch1; 50 uint8_t adr_reg = is_write ? opts->scratch2 : opts->scratch1;
51 uint16_t access_flag = is_write ? MMAP_WRITE : MMAP_READ; 51 uint16_t access_flag = is_write ? MMAP_WRITE : MMAP_READ;
52 uint8_t size = (fun_type == READ_16 || fun_type == WRITE_16) ? SZ_W : SZ_B; 52 uint8_t size = (fun_type == READ_16 || fun_type == WRITE_16) ? SZ_W : SZ_B;
53 uint32_t ram_flags_off = opts->ram_flags_off;
53 for (uint32_t chunk = 0; chunk < num_chunks; chunk++) 54 for (uint32_t chunk = 0; chunk < num_chunks; chunk++)
54 { 55 {
55 if (memmap[chunk].start > 0) { 56 if (memmap[chunk].start > 0) {
56 cmp_ir(code, memmap[chunk].start, adr_reg, opts->address_size); 57 cmp_ir(code, memmap[chunk].start, adr_reg, opts->address_size);
57 lb_jcc = code->cur + 1; 58 lb_jcc = code->cur + 1;
171 } 172 }
172 } 173 }
173 if (is_write && (memmap[chunk].flags & MMAP_CODE)) { 174 if (is_write && (memmap[chunk].flags & MMAP_CODE)) {
174 mov_rr(code, opts->scratch2, opts->scratch1, opts->address_size); 175 mov_rr(code, opts->scratch2, opts->scratch1, opts->address_size);
175 shr_ir(code, opts->ram_flags_shift, opts->scratch1, opts->address_size); 176 shr_ir(code, opts->ram_flags_shift, opts->scratch1, opts->address_size);
176 bt_rrdisp(code, opts->scratch1, opts->context_reg, opts->ram_flags_off, opts->address_size); 177 bt_rrdisp(code, opts->scratch1, opts->context_reg, ram_flags_off, opts->address_size);
178 if (memmap[chunk].mask == opts->address_mask) {
179 ram_flags_off += memmap[chunk].end - memmap[chunk].start;
180 } else {
181 ram_flags_off += memmap[chunk].mask + 1;
182 }
177 code_ptr not_code = code->cur + 1; 183 code_ptr not_code = code->cur + 1;
178 jcc(code, CC_NC, code->cur + 2); 184 jcc(code, CC_NC, code->cur + 2);
179 call(code, opts->save_context); 185 call(code, opts->save_context);
180 call_args(code, opts->handle_code_write, 2, opts->scratch2, opts->context_reg); 186 call_args(code, opts->handle_code_write, 2, opts->scratch2, opts->context_reg);
181 mov_rr(code, RAX, opts->context_reg, SZ_PTR); 187 mov_rr(code, RAX, opts->context_reg, SZ_PTR);