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comparison z80_to_x86.c @ 1057:ff46d8fc2de8

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Fix handling of undocumented flag bits for ADD in 32-bit builds
author Michael Pavone <pavone@retrodev.com>
date Sat, 30 Jul 2016 16:01:57 -0700
parents 47c748455365
children 56713dac6a69
comparison
equal deleted inserted replaced
1056:47c748455365 1057:ff46d8fc2de8
907 add_irdisp(code, src_op.disp, dst_op.base, dst_op.disp, z80_size(inst)); 907 add_irdisp(code, src_op.disp, dst_op.base, dst_op.disp, z80_size(inst));
908 } else { 908 } else {
909 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, z80_size(inst)); 909 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, z80_size(inst));
910 add_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, z80_size(inst)); 910 add_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, z80_size(inst));
911 } 911 }
912 mov_rdispr(code, dst_op.base, dst_op.disp + z80_size(inst) == SZ_B ? 0 : 8, opts->gen.scratch1, SZ_B); 912 mov_rdispr(code, dst_op.base, dst_op.disp + (z80_size(inst) == SZ_B ? 0 : 1), opts->gen.scratch1, SZ_B);
913 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); 913 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_XY), SZ_B);
914 } 914 }
915 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); 915 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C));
916 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); 916 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B);
917 if (z80_size(inst) == SZ_B) { 917 if (z80_size(inst) == SZ_B) {