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diff z80.cpu @ 1759:6e4faa10f9ee

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Store sync_cycle in context rather than in a local in CPU DSL. Fix the timing of a number of instructions in new Z80 core
author Michael Pavone <pavone@retrodev.com>
date Tue, 19 Feb 2019 22:51:33 -0800
parents 093e323dc683
children 7e97d820b491
line wrap: on
line diff
--- a/z80.cpu	Sat Feb 16 13:15:09 2019 -0800
+++ b/z80.cpu	Tue Feb 19 22:51:33 2019 -0800
@@ -25,6 +25,7 @@
 	void zinsert_breakpoint(z80_context * context, uint16_t address, uint8_t * bp_handler);
 	void zremove_breakpoint(z80_context * context, uint16_t address);
 	void z80_options_free(z80_options *opts);
+	void z80_sync_cycle(z80_context *context, uint32_t target_cycle);
 
 regs
 	main 8 b c d e h l f a
@@ -83,6 +84,7 @@
 	add 1 pc pc
 	
 z80_run_op
+	printf "Z80: %X @ %d\n" pc cycles
 	#printf "Z80: %X - A: %X, B: %X, C: %X D: %X, E: %X, H: %X, L: %X, SP: %X, IX: %X, IY: %X @ %d\n" pc a b c d e h l sp ix iy cycles
 	z80_op_fetch
 	dispatch scratch1
@@ -856,6 +858,7 @@
 	update_flags YHXN0C
 	mov hlt l
 	lsr hlt 8 h
+	cycles 7
 	
 00001001 add_hl_bc
 	local hlw 16
@@ -888,40 +891,48 @@
 	or c scratch1 scratch1
 	add scratch1 ix ix
 	update_flags YHXN0C
+	cycles 7
 	
 dd 00011001 add_ix_de
 	lsl d 8 scratch1
 	or e scratch1 scratch1
 	add scratch1 ix ix
 	update_flags YHXN0C
+	cycles 7
 	
 dd 00101001 add_ix_ix
 	add ix ix ix
 	update_flags YHXN0C
+	cycles 7
 	
 dd 00111001 add_ix_sp
 	add sp ix ix
 	update_flags YHXN0C
+	cycles 7
 	
 fd 00001001 add_iy_bc
 	lsl b 8 scratch1
 	or c scratch1 scratch1
 	add scratch1 iy iy
 	update_flags YHXN0C
+	cycles 7
 	
 fd 00011001 add_iy_de
 	lsl d 8 scratch1
 	or e scratch1 scratch1
 	add scratch1 iy iy
 	update_flags YHXN0C
+	cycles 7
 	
 fd 00101001 add_iy_iy
 	add iy iy iy
 	update_flags YHXN0C
+	cycles 7
 	
 fd 00111001 add_iy_sp
 	add sp iy iy
 	update_flags YHXN0C
+	cycles 7
 	
 10001RRR adc_reg
 	adc a main.R a
@@ -1387,6 +1398,7 @@
 z80_inc_pair
 	arg high 8
 	arg low 8
+	cycles 2
 	local word 16
 	lsl high 8 word
 	or low word word
@@ -1484,6 +1496,7 @@
 	sub 1 word word
 	mov word low
 	lsr word 8 high
+	cycles 2
 	
 00001011 dec_bc
 	z80_dec_pair b c
@@ -1655,7 +1668,6 @@
 
 11001001 ret
 	local pch 16
-	cycles 1
 	meta high pch
 	meta low pc
 	z80_pop
@@ -2169,6 +2181,7 @@
 cb 01BBB110 bit_hl
 	local tmp 8
 	z80_fetch_hl
+	cycles 1
 	lsl 1 B tmp
 	lsr wz 8 last_flag_result
 	and scratch1 tmp tmp
@@ -2284,7 +2297,7 @@
 	mov tmp l
 	lsr tmp 8 h
 	ocall read_8
-	cycles 1
+	cycles 2
 	
 z80_ldd_ldi
 	arg change 16
@@ -2317,8 +2330,6 @@
 	mov c pvflag
 	or b pvflag pvflag
 	
-	cycles 5
-	
 
 ed 10100000 ldi
 	z80_ldd_ldi 1