diff cpu_dsl.py @ 1983:a7b753e260a2 mame_interp

Merge from default
author Michael Pavone <pavone@retrodev.com>
date Sat, 09 May 2020 23:39:44 -0700
parents 1dae90605199
children 7d4df6b74263
line wrap: on
line diff
--- a/cpu_dsl.py	Sun Apr 19 00:59:49 2020 -0700
+++ b/cpu_dsl.py	Sat May 09 23:39:44 2020 -0700
@@ -1597,7 +1597,11 @@
 				pieces.append('\n\t\tif (context->cycles >= context->sync_cycle) {')
 				self.meta = {}
 				self.temp = {}
-				self.subroutines[self.interrupt].inline(self, [], pieces, otype, None)
+				intpieces = []
+				self.subroutines[self.interrupt].inline(self, [], intpieces, otype, None)
+				for size in self.temp:
+					pieces.append('\n\tuint{sz}_t gen_tmp{sz}__;'.format(sz=size))
+				pieces += intpieces
 				pieces.append('\n\t\t}')
 			self.meta = {}
 			self.temp = {}