diff z80.cpu @ 1752:d6d4c006a7b3

Initial attempt at interrupts in new Z80 core and integrating it into main executable
author Michael Pavone <pavone@retrodev.com>
date Sun, 10 Feb 2019 11:58:23 -0800
parents 01236179fc71
children 33ec5df77fac
line wrap: on
line diff
--- a/z80.cpu	Sat Feb 09 11:52:43 2019 -0800
+++ b/z80.cpu	Sun Feb 10 11:58:23 2019 -0800
@@ -3,13 +3,29 @@
 	opcode_size 8
 	extra_tables cb ed dded fded ddcb fdcb dd fd
 	body z80_run_op
+	sync_cycle z80_sync_cycle
+	interrupt z80_interrupt
 	include z80_util.c
 	header z80.h
 	
 declare
 	void init_z80_opts(z80_options * options, memmap_chunk const * chunks, uint32_t num_chunks, memmap_chunk const * io_chunks, uint32_t num_io_chunks, uint32_t clock_divider, uint32_t io_address_mask);
 	z80_context * init_z80_context(z80_options *options);
-	
+	void z80_run(z80_context *context, uint32_t target_cycle);
+	void z80_assert_reset(z80_context * context, uint32_t cycle);
+	void z80_clear_reset(z80_context * context, uint32_t cycle);
+	void z80_assert_busreq(z80_context * context, uint32_t cycle);
+	void z80_clear_busreq(z80_context * context, uint32_t cycle);
+	void z80_assert_nmi(z80_context *context, uint32_t cycle);
+	uint8_t z80_get_busack(z80_context * context, uint32_t cycle);
+	void z80_invalidate_code_range(z80_context *context, uint32_t start, uint32_t end);
+	void z80_adjust_cycles(z80_context * context, uint32_t deduction);
+	void z80_serialize(z80_context *context, serialize_buffer *buf);
+	void z80_deserialize(deserialize_buffer *buf, void *vcontext);
+	void zinsert_breakpoint(z80_context * context, uint16_t address, uint8_t * bp_handler);
+	void zremove_breakpoint(z80_context * context, uint16_t address);
+	void z80_options_free(z80_options *opts);
+
 regs
 	main 8 b c d e h l f a
 	alt 8 b' c' d' e' h' l' f' a'
@@ -31,10 +47,18 @@
 	zflag 8
 	scratch1 16
 	scratch2 16
+	busreq 8
+	busack 8
+	reset 8
 	io_map ptrmemmap_chunk
 	io_chunks 32
 	io_mask 32
+	int_cycle 32
+	int_value 8
+	nmi_cycle 32
+	system ptrvoid
 	fastmem ptr8 64
+	mem_pointers ptr8 4
 	
 flags
 	register f
@@ -59,6 +83,49 @@
 z80_run_op
 	z80_op_fetch
 	dispatch scratch1
+
+z80_interrupt
+	cmp int_cycle cycles
+	if >=U
+	
+	mov 0xFFFFFFFF int_cycle
+	mov 0 iff1
+	mov 0 iff2
+	cycles 6
+	update_sync
+	
+	switch imode
+	case 0
+	dispatch int_value
+	
+	case 1
+	dispatch 0xFF
+	
+	case 2
+	lsl i 8 pc
+	or int_value pc pc
+	#CD is call
+	dispatch 0xCD
+	end
+	
+	else
+	
+	cmp nmi_cycle cycles
+	if >=U
+	
+	mov 0xFFFFFFFF nmi_cycle
+	mov 0 iff1
+	local pch 8
+	lsr pc 8 pch
+	meta high pch
+	meta low pc
+	z80_push
+	mov 0x66 pc
+	update_sync
+	
+	end
+	end
+	
 	
 11001011 cb_prefix
 	z80_op_fetch
@@ -1485,7 +1552,9 @@
 	mov 2 imode
 	
 ed 01D01110 im3
-	mov 3 imode
+	#some sources call this mode 0/1, but unclear
+	#if the behavior is really different from im 0
+	mov 0 imode
 	
 11000011 jp
 	z80_fetch_immed16