Mercurial > repos > blastem
diff m68k_core_x86.c @ 989:d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
| author | Michael Pavone <pavone@retrodev.com> |
|---|---|
| date | Wed, 27 Apr 2016 21:39:17 -0700 |
| parents | 1f09994e92c5 |
| children | 33a46d35b913 |
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--- a/m68k_core_x86.c Wed Apr 27 19:10:50 2016 -0700 +++ b/m68k_core_x86.c Wed Apr 27 21:39:17 2016 -0700 @@ -2145,8 +2145,15 @@ call(code, opts->write_16); //save instruction register subi_areg(opts, 2, 7); - //TODO: Use actual value - mov_ir(code, 0, opts->gen.scratch1, SZ_W); + //calculate IR + push_r(code, opts->gen.context_reg); + call(code, opts->gen.save_context); + call_args_abi(code, (code_ptr)m68k_get_ir, 1, opts->gen.context_reg); + mov_rr(code, RAX, opts->gen.scratch1, SZ_W); + pop_r(code, opts->gen.context_reg); + push_r(code, RAX); //save it for use in the "info" word + call(code, opts->gen.load_context); + //write it to the stack areg_to_native(opts, 7, opts->gen.scratch2); call(code, opts->write_16); //save access address @@ -2162,7 +2169,10 @@ and_ir(code, 4, opts->gen.scratch1, SZ_B); //set FC1 to one to indicate instruction fetch, and R/W to indicate read or_ir(code, 0x12, opts->gen.scratch1, SZ_B); - //TODO: Figure out what undefined bits get set to, looks like it might be value of IR + //set undefined bits to IR value + pop_r(code, opts->gen.scratch2); + and_ir(code, 0xFFE0, opts->gen.scratch2, SZ_W); + or_rr(code, opts->gen.scratch2, opts->gen.scratch1, SZ_W); subi_areg(opts, 2, 7); areg_to_native(opts, 7, opts->gen.scratch2); call(code, opts->write_16); @@ -2571,8 +2581,17 @@ call(code, opts->write_16); //save instruction register subi_areg(opts, 2, 7); - //TODO: Use actual value - mov_ir(code, 0, opts->gen.scratch1, SZ_W); + //calculate IR + push_r(code, opts->gen.context_reg); + call(code, opts->gen.save_context); + call_args_abi(code, (code_ptr)m68k_get_ir, 1, opts->gen.context_reg); + mov_rr(code, RAX, opts->gen.scratch1, SZ_W); + pop_r(code, opts->gen.context_reg); + pop_r(code, opts->gen.scratch2); //access address + push_r(code, RAX); //save it for use in the "info" word + push_r(code, opts->gen.scratch2); //access address + call(code, opts->gen.load_context); + //write it to the stack areg_to_native(opts, 7, opts->gen.scratch2); call(code, opts->write_16); //save access address @@ -2588,7 +2607,10 @@ and_ir(code, 4, opts->gen.scratch1, SZ_B); //set FC0 to one to indicate data access or_ir(code, 1, opts->gen.scratch1, SZ_B); - //TODO: Figure out what undefined bits get set to, looks like it might be value of IR + //set undefined bits to IR value + pop_r(code, opts->gen.scratch2); + and_ir(code, 0xFFE0, opts->gen.scratch2, SZ_W); + or_rr(code, opts->gen.scratch2, opts->gen.scratch1, SZ_W); subi_areg(opts, 2, 7); areg_to_native(opts, 7, opts->gen.scratch2); call(code, opts->write_16); @@ -2621,8 +2643,17 @@ call(code, opts->write_16); //save instruction register subi_areg(opts, 2, 7); - //TODO: Use actual value - mov_ir(code, 0, opts->gen.scratch1, SZ_W); + //calculate IR + push_r(code, opts->gen.context_reg); + call(code, opts->gen.save_context); + call_args_abi(code, (code_ptr)m68k_get_ir, 1, opts->gen.context_reg); + mov_rr(code, RAX, opts->gen.scratch1, SZ_W); + pop_r(code, opts->gen.context_reg); + pop_r(code, opts->gen.scratch2); //access address + push_r(code, RAX); //save it for use in the "info" word + push_r(code, opts->gen.scratch2); //access address + call(code, opts->gen.load_context); + //write it to the stack areg_to_native(opts, 7, opts->gen.scratch2); call(code, opts->write_16); //save access address @@ -2638,7 +2669,10 @@ and_ir(code, 4, opts->gen.scratch1, SZ_B); //set FC0 to one to indicate data access, and R/W to indicate read or_ir(code, 0x11, opts->gen.scratch1, SZ_B); - //TODO: Figure out what undefined bits get set to, looks like it might be value of IR + //set undefined bits to IR value + pop_r(code, opts->gen.scratch2); + and_ir(code, 0xFFE0, opts->gen.scratch2, SZ_W); + or_rr(code, opts->gen.scratch2, opts->gen.scratch1, SZ_W); subi_areg(opts, 2, 7); areg_to_native(opts, 7, opts->gen.scratch2); call(code, opts->write_16);