diff z80_to_x86.c @ 262:d97c9eca49f4

Implement ld to and from the I and R registers
author Mike Pavone <pavone@retrodev.com>
date Tue, 30 Apr 2013 20:33:30 -0700
parents f0c53a4bbfa3
children 8fd6652e56f8
line wrap: on
line diff
--- a/z80_to_x86.c	Tue Apr 30 01:00:10 2013 -0700
+++ b/z80_to_x86.c	Tue Apr 30 20:33:30 2013 -0700
@@ -88,8 +88,12 @@
 		if (inst->reg == Z80_IYH) {
 			ea->base = opts->regs[Z80_IYL];
 			dst = ror_ir(dst, 8, opts->regs[Z80_IY], SZ_W);
+		} else if(opts->regs[inst->reg] >= 0) {
+			ea->base = opts->regs[inst->reg];
 		} else {
-			ea->base = opts->regs[inst->reg];
+			ea->mode = MODE_REG_DISPLACE8;
+			ea->base = CONTEXT;
+			ea->disp = offsetof(z80_context, regs) + inst->reg;
 		}
 	}
 	return dst;
@@ -301,9 +305,15 @@
 			dst = translate_z80_reg(inst, &dst_op, dst, opts);
 		}
 		if (src_op.mode == MODE_REG_DIRECT) {
-			dst = mov_rr(dst, src_op.base, dst_op.base, size);
+			if(dst_op.mode == MODE_REG_DISPLACE8) {
+				dst = mov_rrdisp8(dst, src_op.base, dst_op.base, dst_op.disp, size);
+			} else {
+				dst = mov_rr(dst, src_op.base, dst_op.base, size);
+			}
+		} else if(src_op.mode == MODE_IMMED) {
+			dst = mov_ir(dst, src_op.disp, dst_op.base, size);
 		} else {
-			dst = mov_ir(dst, src_op.disp, dst_op.base, size);
+			dst = mov_rdisp8r(dst, src_op.base, src_op.disp, dst_op.base, size);
 		}
 		dst = z80_save_reg(dst, inst, opts);
 		dst = z80_save_ea(dst, inst, opts);