Mercurial > repos > blastem
diff cpu_dsl.py @ 2587:e04c7e753bf6
Implement divs and divu in new CPU core
author | Michael Pavone <pavone@retrodev.com> |
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date | Sat, 08 Feb 2025 20:04:18 -0800 |
parents | 9e10149c9e10 |
children | 6bca3c28e2ad |
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--- a/cpu_dsl.py Sat Feb 08 16:41:20 2025 -0800 +++ b/cpu_dsl.py Sat Feb 08 20:04:18 2025 -0800 @@ -1193,6 +1193,9 @@ 'ocall': Op().addImplementation('c', None, lambda prog, params: '\n\t{pre}{fun}({args});'.format( pre = prog.prefix, fun = params[0], args = ', '.join(['context'] + [str(p) for p in params[1:]]) )), + 'ccall': Op().addImplementation('c', None, lambda prog, params: '\n\t{fun}({args});'.format( + pre = prog.prefix, fun = params[0], args = ', '.join([str(p) for p in params[1:]]) + )), 'pcall': Op().addImplementation('c', None, lambda prog, params: '\n\t(({typ}){fun})({args});'.format( typ = params[1], fun = params[0], args = ', '.join([str(p) for p in params[2:]]) )), @@ -1239,6 +1242,9 @@ if (not type(param) is int) and len(procParams) != len(self.params) - 1: allParamsConst = False procParams.append(param) + if prog.needFlagCoalesce: + output.append(prog.flags.coalesceFlags(prog, otype)) + prog.needFlagCoalesce = False if self.op == 'meta': param,_,index = self.params[1].partition('.')