Mercurial > repos > blastem
diff lc8951.c @ 2350:f8b5142c06aa
Allow 68K to return mid-instruction. Adjust how 68K interrupt ack works so int2 busy flag timing is more correct. Fix some other SCD timing issues
| author | Michael Pavone <pavone@retrodev.com> |
|---|---|
| date | Mon, 16 Oct 2023 23:30:04 -0700 |
| parents | 9f0c67e5c50a |
| children | 0871f555eff6 |
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--- a/lc8951.c Fri Oct 13 22:44:36 2023 -0700 +++ b/lc8951.c Mon Oct 16 23:30:04 2023 -0700 @@ -293,20 +293,12 @@ } } -void lc8951_resume_transfer(lc8951 *context, uint32_t cycle) +void lc8951_resume_transfer(lc8951 *context) { if (context->triggered && context->transfer_end == CYCLE_NEVER && (context->ifctrl & BIT_DOUTEN)) { uint16_t transfer_size = context->regs[DBCL] | (context->regs[DBCH] << 8); - //HACK!!! Work around Sub CPU running longer than we would like and dragging other components with it - uint32_t step_diff = (context->cycle - cycle) / context->clock_step; - if (step_diff) { - context->cycle -= step_diff * context->clock_step; - } context->transfer_end = context->cycle + transfer_size * context->cycles_per_byte; context->next_byte_cycle = context->cycle; - if (step_diff) { - lc8951_run(context, cycle); - } } }