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More efficient register usage in 32-bit mode
author Michael Pavone <pavone@retrodev.com>
date Wed, 27 Jul 2016 23:08:05 -0700
parents f664eeb55cb4
children 2455662378ed f7fe240a7da6
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line source

    dc.l $0, start
start:
	moveq #36, d0
	bsr fib
	illegal
fib:
	cmp.l #2, d0
	blt base
	subq.l #1, d0
	move.l d0, -(a7)
	bsr fib
	move.l (a7), d1
	exg d0, d1
	move.l d1, (a7)
	subq.l #1, d0
	bsr fib
	move.l (a7)+, d1
	add.l d1, d0
	rts
base:
	moveq #1, d0
	rts