view .hgignore @ 470:541c1ae8abf3

Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
author Mike Pavone <pavone@retrodev.com>
date Fri, 13 Sep 2013 19:22:46 -0700
parents 20e77044e861
children c1cfbf1837cf c86f27f5c5a6
line wrap: on
line source

syntax: glob
*.dis
*.asm
*.bin
*.png
*.jpg
*.pdf
*.tar.gz
*~
starscream/*
vdpreverse/*
nemesis/*
html/*
*.o
blastem
dis
stateview
trans