view runtime.S @ 555:5af986d2b9da

Start work on refactoring some of the backend code to allow more sharing between M68K and Z80 cores and possibly also between x86 and the ARM backend when it exists
author Michael Pavone <pavone@retrodev.com>
date Mon, 24 Feb 2014 00:39:02 -0800
parents 3090d016c9e9
children 6b248602ab84 5a6ff0d76032
line wrap: on
line source



invalid_msg:
	.asciz "Invalid instruction at %X\n"

	.global m68k_invalid
m68k_invalid:
	lea invalid_msg(%rip), %rdi
	mov %ecx, %esi
	xor %rax, %rax
	call printf
	mov $1, %rdi
	call exit

	.global bcd_add
bcd_add:
	xchg %rax, %rdi

	mov %cl, %ch
	mov %al, %ah
	and $0xF, %ch
	and $0xF, %ah
	and $0xF0, %cl
	and $0xF0, %al
	add %ah, %ch
	cmp $10, %ch
	jb no_adjust
	add $6, %ch
no_adjust:
	add %ch, %al
	add %al, %cl
	mov $0, %ch
	jc def_adjust
	cmp $0xA0, %cl
	jb no_adjust_h
def_adjust:
	add $0x60, %cl
	mov $1, %ch
no_adjust_h:

	mov %rdi, %rax
	ret

	.global bcd_sub
bcd_sub:
	xchg %rax, %rdi

	mov %cl, %ch
	mov %al, %ah
	and $0xF, %ch
	and $0xF, %ah
	and $0xF0, %cl
	and $0xF0, %al
	sub %ah, %ch
	cmp $10, %ch
	jb no_adjusts
	sub $6, %ch
no_adjusts:
	add %ch, %cl
	sub %al, %cl
	mov $0, %ch
	jc def_adjusts
	cmp $0xA0, %cl
	jb no_adjust_hs
def_adjusts:
	sub $0x60, %cl
	mov $1, %ch
no_adjust_hs:

	mov %rdi, %rax
	ret