view runtime_32.S @ 555:5af986d2b9da

Start work on refactoring some of the backend code to allow more sharing between M68K and Z80 cores and possibly also between x86 and the ARM backend when it exists
author Michael Pavone <pavone@retrodev.com>
date Mon, 24 Feb 2014 00:39:02 -0800
parents 96489fb27dbf
children 5a6ff0d76032
line wrap: on
line source



invalid_msg:
	.asciz "Invalid instruction at %X\n"

	.global m68k_invalid
m68k_invalid:
	push %ecx
	push invalid_msg
	xor %eax, %eax
	call printf
	push $1
	call exit

	.global bcd_add
bcd_add:
	xchg %eax, %edi

	mov %cl, %ch
	mov %al, %ah
	and $0xF, %ch
	and $0xF, %ah
	and $0xF0, %cl
	and $0xF0, %al
	add %ah, %ch
	cmp $10, %ch
	jb no_adjust
	add $6, %ch
no_adjust:
	add %ch, %al
	add %al, %cl
	mov $0, %ch
	jc def_adjust
	cmp $0xA0, %cl
	jb no_adjust_h
def_adjust:
	add $0x60, %cl
	mov $1, %ch
no_adjust_h:

	mov %edi, %eax
	ret

	.global bcd_sub
bcd_sub:
	xchg %eax, %edi

	mov %cl, %ch
	mov %al, %ah
	and $0xF, %ch
	and $0xF, %ah
	and $0xF0, %cl
	and $0xF0, %al
	sub %ah, %ch
	cmp $10, %ch
	jb no_adjusts
	sub $6, %ch
no_adjusts:
	add %ch, %cl
	sub %al, %cl
	mov $0, %ch
	jc def_adjusts
	cmp $0xA0, %cl
	jb no_adjust_hs
def_adjusts:
	sub $0x60, %cl
	mov $1, %ch
no_adjust_hs:

	mov %edi, %eax
	ret