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Only do full sync on VDP data port reads instead of all VDP port reads, provides a perf bump for games that busy wait on the status or HV registers
author Michael Pavone <pavone@retrodev.com>
date Mon, 19 Aug 2019 19:15:52 -0700
parents f7fe240a7da6
children b7ecd0d6a77b
line wrap: on
line source

    dc.l $0, start
start:
	moveq #42, d0
	bsr fib
	reset
fib:
	cmp.l #2, d0
	blt base
	subq.l #1, d0
	move.l d0, -(a7)
	bsr fib
	move.l (a7), d1
	exg d0, d1
	move.l d1, (a7)
	subq.l #1, d0
	bsr fib
	move.l (a7)+, d1
	add.l d1, d0
	rts
base:
	moveq #1, d0
	rts