Mercurial > repos > blastem
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Enabled Z80 debugger in PBC modeWed, 28 Dec 2016 12:28:52 -0800, by Michael Pavone
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Detect failures to initialize a system context and report an error rather than crashingTue, 27 Dec 2016 18:58:31 -0800, by Michael Pavone
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Fix Mode 4 color mappingTue, 27 Dec 2016 14:31:27 -0800, by Michael Pavone
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Clear interrupt status flags after getting the status register value rather than beforeTue, 27 Dec 2016 13:59:01 -0800, by Michael Pavone
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Brighten up Mode 4 colorsTue, 27 Dec 2016 13:46:06 -0800, by Michael Pavone
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The function of the HVC Latch enable bit in mode register 1 is different when not in mode 5Tue, 27 Dec 2016 13:38:58 -0800, by Michael Pavone
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Fix inactive start line for Mode 4 in vdp_next_hint. Fix an off by one error in the range of registers allowed to be written in Mode 4Tue, 27 Dec 2016 13:26:14 -0800, by Michael Pavone
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Implemented Mode 4 sprite list terminationTue, 27 Dec 2016 13:11:07 -0800, by Michael Pavone
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Less broken Mode 4 implementationTue, 27 Dec 2016 12:43:37 -0800, by Michael Pavone
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Somewhat broken implementation of Mode 4Tue, 27 Dec 2016 11:31:17 -0800, by Michael Pavone
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Fix clearing of interrupt pending flags on control port read in PBC modeThu, 22 Dec 2016 20:39:35 -0800, by Michael Pavone
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Added Jaguar header missed in earlier commitsThu, 22 Dec 2016 19:54:11 -0800, by Michael Pavone
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Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.Thu, 22 Dec 2016 19:51:25 -0800, by Michael Pavone
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More cleanup in preparation for SMS/Mark III supportThu, 22 Dec 2016 10:51:33 -0800, by Michael Pavone
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WIP Jaguar GPU/DSP emulationMon, 19 Dec 2016 14:16:59 -0800, by Michael Pavone
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Fix blastjag targetMon, 19 Dec 2016 14:16:43 -0800, by Michael Pavone
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Restore 68K address logging functionalityMon, 19 Dec 2016 13:58:51 -0800, by Michael Pavone
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Fix intermittent crash in GST savestate loadingMon, 19 Dec 2016 13:46:58 -0800, by Michael Pavone
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Mostly working changes to allow support for multiple emulated system types in main blastem programMon, 19 Dec 2016 13:28:18 -0800, by Michael Pavone
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Fix a couple of timing regressions in Z80 coreWed, 14 Dec 2016 23:27:42 -0800, by Michael Pavone
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Fix a subtle bug in interrupt handling introduced with the move to a single cycle register in the Z80 core. Fixes regression in Puyo Puyo 2Wed, 14 Dec 2016 23:26:12 -0800, by Michael Pavone
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Fix Z80 interrupt pulse duration. Fixes inconsistent music playback speed in Sonic 2 introduced in 0.4.1Wed, 14 Dec 2016 20:20:34 -0800, by Michael Pavone
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Fix to the fix of handling of self modifying code. Was ORing the base address with the wrong register before calling the modified code handlerMon, 12 Dec 2016 19:21:22 -0800, by Michael Pavone
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Fix field flag handling bug introduced with VDP/render interface cleanupMon, 12 Dec 2016 09:50:33 -0800, by Michael Pavone