| Thu, 27 Dec 2012 21:54:54 -0800 |
Mike Pavone |
Allow indexed modes to be used as a destination
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| Thu, 27 Dec 2012 21:32:00 -0800 |
Mike Pavone |
Fix address register indexed addressing (probably)
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| Thu, 27 Dec 2012 21:23:55 -0800 |
Mike Pavone |
Fix pc indexed addressing (probably) when used as a source
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| Thu, 27 Dec 2012 21:19:58 -0800 |
Mike Pavone |
Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
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| Thu, 27 Dec 2012 18:21:10 -0800 |
Mike Pavone |
Implement EXT, add some fixes to LINK/UNLK
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| Thu, 27 Dec 2012 10:40:03 -0800 |
Mike Pavone |
Fix some bugs in emulation of CLR
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| Wed, 26 Dec 2012 20:18:58 -0800 |
Mike Pavone |
vertical interrupts now work
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| Wed, 26 Dec 2012 18:20:23 -0800 |
Mike Pavone |
RTE doesn't crash the emulator anymore
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| Wed, 26 Dec 2012 11:09:04 -0800 |
Mike Pavone |
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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| Sat, 22 Dec 2012 21:37:25 -0800 |
Mike Pavone |
Add support for indexed modes as a source, some work on jmp and jsr with areg indirect mode
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| Fri, 21 Dec 2012 21:53:05 -0800 |
Mike Pavone |
Added untested support for LINK and UNLK
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| Fri, 21 Dec 2012 21:26:16 -0800 |
Mike Pavone |
Removed some old debug printfs
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| Fri, 21 Dec 2012 21:19:03 -0800 |
Mike Pavone |
Implement JSR for some addressing modes
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| Fri, 21 Dec 2012 16:38:40 -0800 |
Mike Pavone |
Fix some bugs in movem with a register list destination
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| Fri, 21 Dec 2012 16:04:41 -0800 |
Mike Pavone |
Implement a couple of supervisor instructions
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| Fri, 21 Dec 2012 01:00:52 -0800 |
Mike Pavone |
Implement more instructions and address modes
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| Thu, 20 Dec 2012 09:17:31 -0800 |
Mike Pavone |
Make the translator bail out if it hits an instruction I haven't implemented yet
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| Thu, 20 Dec 2012 00:56:33 -0800 |
Mike Pavone |
Fix BTST
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| Thu, 20 Dec 2012 00:44:59 -0800 |
Mike Pavone |
Gamepad support
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| Wed, 19 Dec 2012 21:25:39 -0800 |
Mike Pavone |
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
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| Wed, 19 Dec 2012 20:23:59 -0800 |
Mike Pavone |
Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM.
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| Tue, 18 Dec 2012 22:56:04 -0800 |
Mike Pavone |
ecx was getting clobbered before the relevant temp value was used in some cases during memory reads
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| Tue, 18 Dec 2012 02:16:42 -0800 |
Mike Pavone |
Get Flavio's color bar demo kind of sort of working
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| Sun, 16 Dec 2012 22:25:29 -0800 |
Mike Pavone |
Add preliminary support for JMP
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| Sun, 16 Dec 2012 21:57:52 -0800 |
Mike Pavone |
Implement CLR, minor refactor of register offset calculation in context struct
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| Sat, 15 Dec 2012 23:01:32 -0800 |
Mike Pavone |
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
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| Wed, 12 Dec 2012 23:21:11 -0800 |
Mike Pavone |
Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
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| Wed, 12 Dec 2012 20:18:06 -0800 |
Mike Pavone |
Add support for dbcc instruction
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| Tue, 04 Dec 2012 19:25:54 -0800 |
Mike Pavone |
Initial support for M68k reset vector, rather than starting at an arbitrary address
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| Tue, 04 Dec 2012 19:13:12 -0800 |
Mike Pavone |
M68K to x86 translation works for a limited subset of instructions and addressing modes
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