Sat, 29 Jun 2013 17:15:08 -0700 |
Mike Pavone |
Add support for loading GST format savestates
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Mon, 24 Jun 2013 21:32:25 -0700 |
Mike Pavone |
Fix access to int_enable_cycle in EI
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Sat, 15 Jun 2013 23:10:48 -0700 |
Mike Pavone |
Fix DI
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Fri, 14 Jun 2013 23:27:01 -0700 |
Mike Pavone |
Fix adc and sbc
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Thu, 13 Jun 2013 22:23:15 -0700 |
Mike Pavone |
Fix LDIR
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Tue, 11 Jun 2013 23:09:57 -0700 |
Mike Pavone |
Bail out on attempt to run code from bank area until it is properly supported
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Sat, 08 Jun 2013 11:31:52 -0700 |
Mike Pavone |
Use a call instruction to figure out the original native address when retranslating so that it does not get lost when the byte transforms from a instruction word to extension word
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Thu, 06 Jun 2013 08:45:54 -0700 |
Mike Pavone |
Removed out of date TODO
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Thu, 06 Jun 2013 08:19:25 -0700 |
Mike Pavone |
Fix LDD and LDDR
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Wed, 05 Jun 2013 22:55:23 -0700 |
Mike Pavone |
Fix dec and inc when the operand is in memory
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Wed, 05 Jun 2013 18:47:39 -0700 |
Mike Pavone |
Fix LDI
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Tue, 04 Jun 2013 22:30:49 -0700 |
Mike Pavone |
Fix set/res when the operand is in memory
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Sun, 02 Jun 2013 21:12:26 -0700 |
Mike Pavone |
Fix cycle count for inc and dec
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Sun, 02 Jun 2013 20:14:27 -0700 |
Mike Pavone |
Bunch of Z80 debugger improvements
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Fri, 31 May 2013 20:46:56 -0700 |
Mike Pavone |
Fix P condition in Z80 core
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Fri, 31 May 2013 19:43:13 -0700 |
Mike Pavone |
Partial implementation of Z80 debugger
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Wed, 29 May 2013 00:13:48 -0700 |
Mike Pavone |
Fix push AF
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Mon, 27 May 2013 20:37:55 -0700 |
Mike Pavone |
Fix sizeof expression passed to malloc in z80_init to avoid a minor memory error
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Tue, 14 May 2013 21:59:56 -0700 |
Mike Pavone |
Some Z80 interrupt fixes
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Thu, 09 May 2013 20:09:49 -0700 |
Mike Pavone |
Fix return address for RST
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Thu, 09 May 2013 19:38:28 -0700 |
Mike Pavone |
Show absolute addresses for JR, JRCC and DJNZ in Z80 disassembler
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Thu, 09 May 2013 19:24:18 -0700 |
Mike Pavone |
Fix terminal instruction detection in disassembler
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Thu, 09 May 2013 18:36:21 -0700 |
Mike Pavone |
Properly handle instructions that use boty IYH and IYL
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Thu, 09 May 2013 00:33:06 -0700 |
Mike Pavone |
Set the N flag to the correct value for DEC instructions
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Thu, 09 May 2013 00:30:55 -0700 |
Mike Pavone |
Implement carry flag for shift instructions. Implement weird behavior for bit 0 of SLL. Fix missing break statement in SRL.
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Thu, 09 May 2013 00:17:12 -0700 |
Mike Pavone |
Correctly set the N flag for SBC
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Thu, 09 May 2013 00:14:54 -0700 |
Mike Pavone |
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
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Wed, 08 May 2013 23:44:49 -0700 |
Mike Pavone |
Complete flag behavior for Z80 BIT instruction
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Wed, 08 May 2013 23:31:19 -0700 |
Mike Pavone |
Properly handle negative displacements in Z80 core
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Wed, 08 May 2013 23:29:21 -0700 |
Mike Pavone |
Contrary to the official documenation, OR and AND also set PV based on parity instead of overflow
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