| Tue, 19 May 2015 23:23:53 -0700 |
Michael Pavone |
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
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| Sun, 17 May 2015 15:43:20 -0700 |
Michael Pavone |
Fix VDP status register PAL bit based on observations of the Titan Overdrive demo
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| Sat, 16 May 2015 23:08:07 -0700 |
Michael Pavone |
Adjust H32 vint slot in response to latest test ROM data
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| Sat, 16 May 2015 23:04:57 -0700 |
Michael Pavone |
First pass at emulating a vscroll latch. Titan's Overdrive demo seems to depend on the scroll value being latched early in the line before the HINT gets a chance to change it
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| Thu, 14 May 2015 23:17:55 -0700 |
Michael Pavone |
Small horizontal interrupt fixes
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| Wed, 13 May 2015 19:19:43 -0700 |
Michael Pavone |
Add description of cd register value to vr debugger command
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| Mon, 11 May 2015 20:30:35 -0700 |
Michael Pavone |
Fix frame counter increment and VINT cycle time calculation
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| Mon, 11 May 2015 00:28:47 -0700 |
Michael Pavone |
Sync fixes and logging to fix more sync issues
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| Sun, 04 Jan 2015 23:05:37 -0800 |
Michael Pavone |
Some small synchronization improvements that do not seem to fix anything
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| Sun, 04 Jan 2015 12:24:34 -0800 |
Michael Pavone |
Adjusted h40_hsync_cycles so that lines actually take 3420 mclks. Fixed vdp_cycles_next_line to take h40_sync_cycles into account
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| Sun, 14 Dec 2014 18:14:50 -0800 |
Michael Pavone |
Fix the HV counter and adjust the slots of certain VDP events
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| Thu, 14 Aug 2014 09:38:32 -0700 |
Michael Pavone |
Small fix to display of DMA source address in vr debug command
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| Wed, 18 Jun 2014 16:39:42 -0700 |
Michael Pavone |
Remove debug printf that escaped into my previous commit
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| Wed, 18 Jun 2014 16:30:19 -0700 |
Michael Pavone |
Fix most of the breakage caused by the vcounter/hcounter changes
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| Tue, 17 Jun 2014 19:01:01 -0700 |
Michael Pavone |
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
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