log genesis.c @ 1931:374a5ae694e8 mame_interp

age author description
Sat, 18 Apr 2020 11:42:53 -0700 Michael Pavone Merge from default mame_interp
Thu, 16 Apr 2020 22:37:01 -0700 Mike Pavone Update libretro target to use render_audio shared audio code
Thu, 02 Apr 2020 20:32:09 -0700 Michael Pavone Don't lockup on writes to !TIME or !FDC regions regardless of whether anything is mapped there
Thu, 02 Apr 2020 20:17:08 -0700 Michael Pavone Reading from Z80 bus when Z80 is not bus requested should return open bus. Fixes regression in Metal Sonic Rebooted
Fri, 27 Mar 2020 00:03:58 -0700 Michael Pavone Initial stab at VGM logging support
Wed, 25 Mar 2020 22:59:59 -0700 Michael Pavone Some partial work on TMSS registers, more accurate open bus locations and implement machine freezes for unmapped areas in the IO region
Thu, 27 Feb 2020 18:38:15 -0800 Michael Pavone Make VDP VSRAM capacity respect model selection
Wed, 26 Feb 2020 22:40:37 -0800 Michael Pavone Implement selectable YM2612/YM3834 invalid status port behavior
Mon, 24 Feb 2020 20:06:29 -0800 Michael Pavone Fix YM2612 busy flag timing
Sun, 16 Feb 2020 10:46:35 -0800 Michael Pavone Set version reg and TAS behavior based on model config
Sat, 21 Sep 2019 20:26:12 -0700 Michael Pavone Report more accurate frame and sample rates to frontend in libretro target
Mon, 19 Aug 2019 19:15:52 -0700 Michael Pavone Only do full sync on VDP data port reads instead of all VDP port reads, provides a perf bump for games that busy wait on the status or HV registers
Mon, 24 Jun 2019 23:47:16 -0700 Michael Pavone Fix accuracy bugs used by Novedicus to detect BlastEm/Exodus
Tue, 23 Apr 2019 23:31:34 -0700 Michael Pavone Don't print out a message when saving a state to the serialization pseudo-slot
Tue, 23 Apr 2019 18:37:08 -0700 Michael Pavone 16-bit wide save RAM is stored in memory byteswapped for performance reasons, but saving it to disc that way isn't great. Swap before save/after load to fix
Sun, 14 Apr 2019 23:38:02 -0700 Michael Pavone Merge from default mame_interp
Sun, 24 Mar 2019 19:59:41 -0700 Michael Pavone Optionally emulate the offset around zero in the imperfect DAC of a discrete YM2612
Sat, 23 Mar 2019 17:18:10 -0700 Michael Pavone Configurable gain for overall output and individual components
Wed, 13 Mar 2019 20:34:24 -0700 Michael Pavone Make get_open_bus_value work right with Musashi mame_interp
Wed, 13 Mar 2019 18:57:11 -0700 Michael Pavone Make refresh delay emulation play nice with Musashi mame_interp
Tue, 12 Mar 2019 21:59:52 -0700 Michael Pavone Remove MAME Z80 core in favor of my new Z80 core mame_interp
Fri, 01 Mar 2019 14:17:29 -0800 Michael Pavone Merge from default mame_interp
Wed, 20 Feb 2019 09:42:12 -0800 Michael Pavone Fix Z80 interrupts in Gen/MD mode when using new core. Disable CPU debug log in new Z80 core
Tue, 19 Feb 2019 07:03:57 +0000 Michael Pavone Fix build mame_interp
Tue, 12 Feb 2019 09:58:04 -0800 Michael Pavone Integration of new Z80 core is sort of working now
Sun, 10 Feb 2019 11:58:23 -0800 Michael Pavone Initial attempt at interrupts in new Z80 core and integrating it into main executable
Thu, 24 Jan 2019 19:15:59 -0800 Michael Pavone Merge from default mame_interp
Sat, 05 Jan 2019 00:58:08 -0800 Michael Pavone Merge from default segacd
Sun, 20 Jan 2019 22:19:58 -0800 Mike Pavone Implement serialization/deserialization in libretro build
Sun, 20 Jan 2019 16:24:22 -0800 Mike Pavone Fixed the most glaring issues in libretro build