log sms.c @ 1931:374a5ae694e8 mame_interp

age author description
Sat, 18 Apr 2020 11:42:53 -0700 Michael Pavone Merge from default mame_interp
Thu, 27 Feb 2020 18:38:15 -0800 Michael Pavone Make VDP VSRAM capacity respect model selection
Sun, 14 Apr 2019 23:38:02 -0700 Michael Pavone Merge from default mame_interp
Sat, 23 Mar 2019 17:18:10 -0700 Michael Pavone Configurable gain for overall output and individual components
Tue, 12 Mar 2019 21:59:52 -0700 Michael Pavone Remove MAME Z80 core in favor of my new Z80 core mame_interp
Fri, 01 Mar 2019 14:17:29 -0800 Michael Pavone Merge from default mame_interp
Tue, 19 Feb 2019 22:51:33 -0800 Michael Pavone Store sync_cycle in context rather than in a local in CPU DSL. Fix the timing of a number of instructions in new Z80 core
Tue, 19 Feb 2019 07:03:57 +0000 Michael Pavone Fix build mame_interp
Sun, 10 Feb 2019 11:58:23 -0800 Michael Pavone Initial attempt at interrupts in new Z80 core and integrating it into main executable
Thu, 24 Jan 2019 19:15:59 -0800 Michael Pavone Merge from default mame_interp
Sun, 20 Jan 2019 22:19:58 -0800 Mike Pavone Implement serialization/deserialization in libretro build
Sun, 20 Jan 2019 16:24:22 -0800 Mike Pavone Fixed the most glaring issues in libretro build
Tue, 25 Dec 2018 11:12:26 -0800 Michael Pavone Merge from default mame_interp
Mon, 19 Nov 2018 19:26:57 -0800 Michael Pavone Removed old VDP debug functionality
Fri, 16 Nov 2018 19:56:24 -0800 Michael Pavone Small cleanup of vdp_context struct layout and removal of separately allocated buffers